Hooker; Rodney E.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hooker; Rodney E..The latest application filed is for "cache memory budgeted by ways based on memory access type".

Company Profile

8.161.138

Hooker; Rodney E. - Austin TX
- Austin TX US

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Processor with memory controller including dynamically programmable functional unit Grant 11,061,853 - Henry , et al. July 13, 2	2021-07-13
Processor with an expandable instruction set architecture for dynamically configuring execution resources Grant 10,642,617 - Henry , et al.	2020-05-05
Dynamically updating hardware prefetch trait to exclusive or shared at program detection Grant 10,514,920 - Hooker , et al. Dec	2019-12-24
Asymmetric multi-core processor with native switching mechanism Grant 10,423,216 - Hooker , et al. Sept	2019-09-24
Prefetching with level of aggressiveness based on effectiveness by memory access type Grant 10,387,318 - Hooker , et al. A	2019-08-20
Processor with programmable prefetcher operable to generate at least one prefetch address based on load requests Grant 10,268,586 - Henry , et al.	2019-04-23
Processor with programmable prefetcher operable to generate at least one prefetch address based on load requests Grant 10,268,587 - Henry , et al.	2019-04-23
Processor with approximate computing execution unit that includes an approximation control register having an approximation mode flag, an approximation amount, and an error threshold, where the approximation control register is writable by an instruction set instruction Grant 10,235,232 - Henry , et al.	2019-03-19
Conversion system for a processor with an expandable instruction set architecture for dynamically configuring execution resources Grant 10,146,543 - Henry , et al. De	2018-12-04
Compiler system for a processor with an expandable instruction set architecture for dynamically configuring execution resources Grant 10,127,041 - Henry , et al. November 13, 2	2018-11-13
Dynamic powering of cache memory by ways within multiple set groups based on utilization trends Grant 10,073,787 - Reed , et al. September 11, 2	2018-09-11
Logic analyzer for detecting hangs Grant 10,067,871 - Hooker , et al. September 4, 2	2018-09-04
Fingerprint units comparing stored static fingerprints with dynamically generated fingerprints and reconfiguring processor settings upon a fingerprint match Grant 10,019,260 - Henry , et al. July 10, 2	2018-07-10
Sanitize-aware DRAM controller Grant 9,972,375 - Parks , et al. May 15, 2	2018-05-15
Microprocessor with ALU integrated into store unit Grant 9,952,875 - Col , et al. April 24, 2	2018-04-24
Pattern detector for detecting hangs Grant 9,946,651 - Hooker , et al. April 17, 2	2018-04-17
Cache memory budgeted by ways based on memory access type Grant 9,910,785 - Hooker , et al. March 6, 2	2018-03-06
Cache memory diagnostic writeback Grant 9,911,508 - Hooker , et al. March 6, 2	2018-03-06
Cache memory budgeted by chunks based on memory access type Grant 9,898,411 - Hooker , et al. February 20, 2	2018-02-20
Microprocessor with arm and X86 instruction length decoders Grant 9,898,291 - Henry , et al. February 20, 2	2018-02-20
Dynamically updating hardware prefetch trait to exclusive or shared in multi-memory access agent system Grant 9,891,916 - Hooker , et al. February 13, 2	2018-02-13
Inter-core communication via uncore RAM Grant 9,891,927 - Henry , et al. February 13, 2	2018-02-13
Fractional use of prediction history storage for operating system routines Grant 9,891,918 - Hooker , et al. February 13, 2	2018-02-13
Multiple data prefetchers that defer to one another based on prefetch effectiveness by memory access type Grant 9,817,764 - Hooker , et al. November 14, 2	2017-11-14
Set associative cache memory with heterogeneous replacement policy Grant 9,811,468 - Hooker , et al. November 7, 2	2017-11-07
Cache Memory Budgeted By Ways Based On Memory Access Type App 20170315921 - HOOKER; RODNEY E. ; et al.	2017-11-02
Processor With Memory Controller Including Dynamically Programmable Functional Unit App 20170308314 - HENRY; G. GLENN ; et al.	2017-10-26
Sanitize-aware Dram Controller App 20170301386 - PARKS; TERRY ; et al.	2017-10-19
Dynamic Powering Of Cache Memory By Ways Within Multiple Set Groups Based On Utilization Trends App 20170300418 - REED; DOUGLAS R. ; et al.	2017-10-19
Conditional pattern detector for detecting hangs Grant 9,753,799 - Hooker , et al. September 5, 2	2017-09-05
Dynamic system configuration based on cloud-collaborative experimentation Grant 9,755,902 - Chen , et al. September 5, 2	2017-09-05
Processor With Programmable Prefetcher App 20170161195 - HENRY; G. GLENN ; et al.	2017-06-08
Processor With An Expandable Instruction Set Architecture For Dynamically Configuring Execution Resources App 20170161067 - HENRY; G. GLENN ; et al.	2017-06-08
Processor With Programmable Prefetcher App 20170161196 - HENRY; G. GLENN ; et al.	2017-06-08
Compiler System For A Processor With An Expandable Instruction Set Architecture For Dynamically Configuring Execution Resources App 20170161036 - HENRY; G. GLENN ; et al.	2017-06-08
Conversion System For A Processor With An Expandable Instruction Set Architecture For Dynamically Configuring Execution Resources App 20170161037 - HENRY; G. GLENN ; et al.	2017-06-08
Cache replacement policy that considers memory access type Grant 9,652,398 - Hooker , et al. May 16, 2	2017-05-16
Fully associative cache memory budgeted by memory access type Grant 9,652,400 - Hooker , et al. May 16, 2	2017-05-16
Conditional store instructions in an out-of-order execution microprocessor Grant 9,645,822 - Henry , et al. May 9, 2	2017-05-09
Prefetching With Level Of Aggressiveness Based On Effectiveness By Memory Access Type App 20170123985 - HOOKER; RODNEY E. ; et al.	2017-05-04
Processor that recovers from excessive approximate computing error Grant 9,588,845 - Henry , et al. March 7, 2	2017-03-07
Dynamically configurable system based on cloud-collaborative experimentation Grant 9,575,778 - Chen , et al. February 21, 2	2017-02-21
Deadlock/livelock resolution using service processor Grant 9,575,816 - Hooker , et al. February 21, 2	2017-02-21
Selective prefetching of physically sequential cache line to cache line that includes loaded page table entry Grant 9,569,363 - Hooker , et al. February 14, 2	2017-02-14
Multiple Data Prefetchers That Defer To One Another Based On Prefetch Effectiveness By Memory Access Type App 20160357677 - HOOKER; RODNEY E. ; et al.	2016-12-08
Set Associative Cache Memory With Heterogeneous Replacement Policy App 20160357680 - HOOKER; RODNEY E. ; et al.	2016-12-08
Conditional Pattern Detector For Detecting Hangs App 20160350167 - HOOKER; Rodney E. ; et al.	2016-12-01
Cache Replacement Policy That Considers Memory Access Type App 20160350228 - HOOKER; RODNEY E. ; et al.	2016-12-01
Cache Memory Budgeted By Chunks Based On Memory Access Type App 20160350227 - HOOKER; RODNEY E. ; et al.	2016-12-01
Pattern Detector For Detecting Hangs App 20160350224 - HOOKER; RODNEY E. ; et al.	2016-12-01
Logic Analyzer For Detecting Hangs App 20160350223 - HOOKER; RODNEY E. ; et al.	2016-12-01
Selective accumulation and use of predicting unit history Grant 9,507,597 - Hooker , et al. November 29, 2	2016-11-29
Microprocessor with ALU integrated into load unit Grant 9,501,286 - Col , et al. November 22, 2	2016-11-22
Uncore microcode ROM Grant 9,483,263 - Henry , et al. November 1, 2	2016-11-01
Communicating prefetchers that throttle one another Grant 9,483,406 - Hooker , et al. November 1, 2	2016-11-01
Cache Memory Diagnostic Writeback App 20160293273 - HOOKER; RODNEY E. ; et al.	2016-10-06
Cache System With A Primary Cache And An Overflow Fifo Cache App 20160259728 - EDDY; COLIN ; et al.	2016-09-08
Microprocessor With Arm And X86 Instruction Length Decoders App 20160202980 - HENRY; G. GLENN ; et al.	2016-07-14
Processor that performs approximate computing instructions Grant 9,389,863 - Henry , et al. July 12, 2	2016-07-12
Fully Associative Cache Memory Budgeted By Memory Access Type App 20160196214 - HOOKER; RODNEY E. ; et al.	2016-07-07
Conditional load instructions in an out-of-order execution microprocessor Grant 9,378,019 - Henry , et al. June 28, 2	2016-06-28
Cache System With A Primary Cache And An Overflow Cache That Use Different Indexing Schemes App 20160170884 - EDDY; COLIN ; et al.	2016-06-16
Asymmetric Processor With Cores That Support Different Isa Instruction Subsets App 20160162293 - HOOKER; RODNEY E. ; et al.	2016-06-09
Dynamically Updating Hardware Prefetch Trait To Exclusive Or Shared At Program Detection App 20160110194 - HOOKER; RODNEY E. ; et al.	2016-04-21
Dynamically Updating Hardware Prefetch Trait To Exclusive Or Shared In Multi-memory Access Agent System App 20160110289 - HOOKER; RODNEY E. ; et al.	2016-04-21
Microprocessor with boot indicator that indicates a boot ISA of the microprocessor as either the X86 ISA or the ARM ISA Grant 9,317,301 - Henry , et al. April 19, 2	2016-04-19
Multi-core microprocessor that performs x86 ISA and ARM ISA machine language program instructions by hardware translation into microinstructions executed by common execution pipeline Grant 9,317,288 - Henry , et al. April 19, 2	2016-04-19
Conditional non-branch instruction prediction Grant 9,274,795 - Henry , et al. March 1, 2	2016-03-01
Communicating prefetchers in a microprocessor Grant 9,251,083 - Hooker , et al. February 2, 2	2016-02-02
Microprocessor that translates conditional load/store instructions into variable number of microinstructions Grant 9,244,686 - Henry , et al. January 26, 2	2016-01-26
Dynamic System Configuration Based On Cloud-collaborative Experimentation App 20150341218 - CHEN; WEN-CHI ; et al.	2015-11-26
Dynamically Configurable System Based On Cloud-collaborative Experimentation App 20150339132 - CHEN; WEN-CHI ; et al.	2015-11-26
Load multiple and store multiple instructions in a microprocessor that emulates banked registers Grant 9,176,733 - Henry , et al. November 3, 2	2015-11-03
Selective Prefetching Of Physically Sequential Cache Line To Cache Line That Includes Loaded Page Table Entry App 20150309936 - HOOKER; RODNEY E.	2015-10-29
Heterogeneous ISA microprocessor that preserves non-ISA-specific configuration state when reset to different ISA Grant 9,146,742 - Henry , et al. September 29, 2	2015-09-29
Generating constant for microinstructions from modified immediate field during instruction translation Grant 9,128,701 - Henry , et al. September 8, 2	2015-09-08
Processor That Performs Approximate Computing Instructions App 20150227372 - HENRY; G. GLENN ; et al.	2015-08-13
Processor With Approximate Computing Functional Unit App 20150227407 - HENRY; G. GLENN ; et al.	2015-08-13
Processor That Recovers From Excessive Approximate Computing Error App 20150227429 - HENRY; G. GLENN ; et al.	2015-08-13
Fractional Use Of Prediction History Storage For Operating System Routines App 20150212822 - HOOKER; RODNEY E. ; et al.	2015-07-30
Accessing model specific registers (MSR) with different sets of distinct microinstructions for instructions of different instruction set architecture (ISA) Grant 9,043,580 - Henry , et al. May 26, 2	2015-05-26
Efficient conditional ALU instruction in read-port limited register file microprocessor Grant 9,032,189 - Henry , et al. May 12, 2	2015-05-12
Dynamically Reconfigurable Microprocessor App 20150089204 - Henry; G. Glenn ; et al.	2015-03-26
Microprocessor With Boot Indicator That Indicates A Boot Isa Of The Microprocessor As Either The X86 Isa Or The Arm Isa App 20150067301 - HENRY; G. GLENN ; et al.	2015-03-05
Inter-core Communication Via Uncore Ram App 20150067306 - Henry; G. Glenn ; et al.	2015-03-05
Out-of-order execution microprocessor with reduced store collision load replay by making an issuing of a load instruction dependent upon a dependee instruction of a store instruction Grant 8,930,679 - Day , et al. January 6, 2	2015-01-06
Conditional ALU instruction condition satisfaction propagation between microinstructions in read-port limited register file microprocessor Grant 08924695 -	2014-12-30
Conditional ALU instruction condition satisfaction propagation between microinstructions in read-port limited register file microprocessor Grant 8,924,695 - Henry , et al. December 30, 2	2014-12-30
Selective Accumulation And Use Of Predicting Unit History App 20140365753 - Hooker; Rodney E. ; et al.	2014-12-11
Microprocessor that refrains from executing a mispredicted branch in the presence of an older unretired cache-missing load instruction Grant 8,909,908 - Hooker , et al. December 9, 2	2014-12-09
Conditional ALU instruction pre-shift-generated carry flag propagation between microinstructions in read-port limited register file microprocessor Grant 8,880,857 - Henry , et al. November 4, 2	2014-11-04
Microprocessor that performs X86 ISA and arm ISA machine language program instructions by hardware translation into microinstructions executed by common execution pipeline Grant 8,880,851 - Henry , et al. November 4, 2	2014-11-04
Bounding box prefetcher Grant 8,880,807 - Hooker , et al. November 4, 2	2014-11-04
Out-of-order execution microprocessor that speculatively executes dependent memory access instructions by predicting no value change by older instructions that load a segment register Grant 8,880,854 - Hooker , et al. November 4, 2	2014-11-04
Communicating Prefetchers That Throttle One Another App 20140310479 - Hooker; Rodney E. ; et al.	2014-10-16
Uncore Microcode Rom App 20140297993 - Henry; G. Glenn ; et al.	2014-10-02
Asymmetric Multi-core Processor With Native Switching Mechanism App 20140298060 - Hooker; Rodney E. ; et al.	2014-10-02
Bounding Box Prefetcher App 20140289479 - Hooker; Rodney E. ; et al.	2014-09-25
Communicating Prefetchers In A Microprocessor App 20140258641 - Hooker; Rodney E. ; et al.	2014-09-11
Microprocessor cache line evict array Grant 8,782,348 - Eddy , et al. July 15, 2	2014-07-15
Bounding box prefetcher Grant 8,762,649 - Hooker , et al. June 24, 2	2014-06-24
Multi-core processor with external instruction execution rate heartbeat Grant 8,762,779 - Gaskins , et al. June 24, 2	2014-06-24
Bounding box prefetcher with reduced warm-up penalty on memory block crossings Grant 8,719,510 - Hooker , et al. May 6, 2	2014-05-06
Microprocessor That Translates Conditional Load/store Instructions Into Variable Number Of Microinstructions App 20140122847 - Henry; G. Glenn ; et al.	2014-05-01
Conditional Store Instructions In An Out-of-order Execution Microprocessor App 20140122843 - Henry; G. Glenn ; et al.	2014-05-01
Combined L2 cache and L1D cache prefetcher Grant 8,645,631 - Hooker , et al. February 4, 2	2014-02-04
Conditional Load Instructions In An Out-of-order Execution Microprocessor App 20140013089 - Henry; G. Glenn ; et al.	2014-01-09
Prefetching Of Next Physically Sequential Cache Line After Cache Line That Includes Loaded Page Table Entry App 20140013058 - Hooker; Rodney E. ; et al.	2014-01-09
Deadlock/livelock Resolution Using Service Processor App 20130318530 - Hooker; Rodney E.	2013-11-28
Executing repeat load string instruction with guaranteed prefetch microcode to prefetch into cache for loading up to the last value in architectural register Grant 8,595,471 - Henry , et al. November 26, 2	2013-11-26
Microprocessor with multiple operating modes dynamically configurable by a device driver based on currently running applications Grant 8,566,565 - Hooker , et al. October 22, 2	2013-10-22
Efficient data prefetching in the presence of load hits Grant 8,543,765 - Glover , et al. September 24, 2	2013-09-24
Store-to-load forwarding based on load/store address computation source information comparisons Grant 8,533,438 - Hooker , et al. September 10, 2	2013-09-10
Guaranteed prefetch instruction Grant 8,533,437 - Henry , et al. September 10, 2	2013-09-10
Apparatus and method for detection and correction of denormal speculative floating point operand Grant 8,495,343 - Henry , et al. July 23, 2	2013-07-23
Efficient data prefetching in the presence of load hits Grant 8,489,823 - Glover , et al. July 16, 2	2013-07-16
Out-of-order execution microprocessor with reduced store collision load replay reduction Grant 8,464,029 - Day , et al. June 11, 2	2013-06-11
Prefetching of next physically sequential cache line after cache line that includes loaded page table entry Grant 8,433,853 - Eddy , et al. April 30, 2	2013-04-30
Conditional Non-branch Instruction Prediction App 20130067202 - Henry; G. Glenn ; et al.	2013-03-14
Control Register Mapping In Heterogeneous Instruction Set Architecture Processor App 20130067199 - Henry; G. Glenn ; et al.	2013-03-14
Low power high speed load-store collision detector Grant 8,392,666 - Hooker , et al. March 5, 2	2013-03-05
Fast REP STOS using grabline operations Grant 8,392,693 - Henry , et al. March 5, 2	2013-03-05
Microprocessor with repeat prefetch indirect instruction Grant 8,364,902 - Hooker , et al. January 29, 2	2013-01-29
Avoiding memory access latency by returning hit-modified when holding non-modified data Grant 8,364,906 - Hooker , et al. January 29, 2	2013-01-29
Efficient pseudo-LRU for colliding accesses Grant 8,301,842 - Eddy , et al. October 30, 2	2012-10-30
Efficient Data Prefetching In The Presence Of Load Hits App 20120272003 - Glover; Clinton Thomas ; et al.	2012-10-25
Efficient Data Prefetching In The Presence Of Load Hits App 20120272004 - Glover; Clinton Thomas ; et al.	2012-10-25
Multi-modal data prefetcher Grant 8,291,172 - Hooker , et al. October 16, 2	2012-10-16
Multi-core Microprocessor That Performs X86 Isa And Arm Isa Machine Language Program Instructions By Hardware Translation Into Microinstructions Executed By Common Execution Pipeline App 20120260065 - Henry; G. Glenn ; et al.	2012-10-11
Conditional Alu Instruction Pre-shift-generated Carry Flag Propagation Between Microinstructions In Read-port Limited Register File Microprocessor App 20120260075 - Henry; G. Glenn ; et al.	2012-10-11
Conditional Alu Instruction Condition Satisfaction Propagation Between Microinstructions In Read-port Limited Register File Microprocessor App 20120260071 - Henry; G. Glenn ; et al.	2012-10-11
Emulation Of Execution Mode Banked Registers App 20120260073 - Henry; G. Glenn ; et al.	2012-10-11
Apparatus And Method For Handling Of Modified Immediate Constant During Instruction Translation App 20120260068 - Henry; G. Glenn ; et al.	2012-10-11
Efficient Conditional Alu Instruction In Read-port Limited Register File Microprocessor App 20120260074 - Henry; G. Glenn ; et al.	2012-10-11
Heterogeneous Isa Microprocessor That Preserves Non-isa-specific Configuration State When Reset To Different Isa App 20120260066 - Henry; G. Glenn ; et al.	2012-10-11
Heterogeneous Isa Microprocessor With Shared Hardware Isa Registers App 20120260064 - Henry; G. Glenn ; et al.	2012-10-11
Load Multiple And Store Multiple Instructions In A Microprocessor That Emulates Banked Registers App 20120260042 - Henry; G. Glenn ; et al.	2012-10-11
Microprocessor That Performs X86 Isa And Arm Isa Machine Language Program Instructions By Hardware Translation Into Microinstructions Executed By Common Execution Pipeline App 20120260067 - Henry; G. Glenn ; et al.	2012-10-11
Prefetching Of Next Physically Sequential Cache Line After Cache Line That Includes Loaded Page Table Entry App 20120198176 - Hooker; Rodney E. ; et al.	2012-08-02
Efficient data prefetching in the presence of load hits Grant 8,234,450 - Glover , et al. July 31, 2	2012-07-31
Prefetching of next physically sequential cache line after cache line that includes loaded page table entry Grant 8,161,246 - Hooker , et al. April 17, 2	2012-04-17
Data cache with modified bit array Grant 8,108,621 - Hooker , et al. January 31, 2	2012-01-31
Data cache with modified bit array Grant 8,108,624 - Hooker , et al. January 31, 2	2012-01-31
Microprocessor with fused store address/store data microinstruction Grant 8,090,931 - Col , et al. January 3, 2	2012-01-03
Microprocessor with microarchitecture for efficiently executing read/modify/write memory operand instructions Grant 8,069,340 - Hooker , et al. November 29, 2	2011-11-29
Multi-modal Data Prefetcher App 20110264860 - Hooker; Rodney E. ; et al.	2011-10-27
Combined L2 Cache And L1d Cache Prefetcher App 20110238923 - Hooker; Rodney E. ; et al.	2011-09-29
Bounding Box Prefetcher With Reduced Warm-up Penalty On Memory Block Crossings App 20110238920 - Hooker; Rodney E. ; et al.	2011-09-29
Bounding Box Prefetcher App 20110238922 - Hooker; Rodney E. ; et al.	2011-09-29
Microprocessor that performs speculative tablewalks Grant 7,996,650 - Eddy , et al. August 9, 2	2011-08-09
Multi-core Processor With External Instruction Execution Rate Heartbeat App 20110185160 - Gaskins; Darius D. ; et al.	2011-07-28
Microprocessor That Performs Fast Repeat String Loads App 20110185155 - Henry; G. Glenn ; et al.	2011-07-28
Avoiding Memory Access Latency By Returning Hit-modified When Holding Non-modified Data App 20110113196 - Hooker; Rodney E. ; et al.	2011-05-12
Apparatus And Method For Detection And Correction Of Denormal Speculative Floating Point Operand App 20110060943 - Henry; G. Glenn ; et al.	2011-03-10
Efficient Pseudo-lru For Colliding Accesses App 20110055485 - Eddy; Colin ; et al.	2011-03-03
Fast Rep Stos Using Grabline Operations App 20110055530 - Henry; G. Glenn ; et al.	2011-03-03
Store-to-load Forwarding Based On Load/store Address Computation Source Information Comparisons App 20110040955 - Hooker; Rodney E. ; et al.	2011-02-17
Microprocessor With Alu Integrated Into Load Unit App 20110035569 - Col; Gerard M. ; et al.	2011-02-10
Microprocessor With Alu Integrated Into Store Unit App 20110035570 - Col; Gerard M. ; et al.	2011-02-10
Microprocessor With Repeat Prefetch Indirect Instruction App 20110035551 - Hooker; Rodney E. ; et al.	2011-02-10
Data Prefetcher With Multi-level Table For Predicting Stride Patterns App 20110010506 - Greer; John Michael ; et al.	2011-01-13
Efficient Data Prefetching In The Presence Of Load Hits App 20110010501 - Glover; Clinton Thomas ; et al.	2011-01-13
Dynamic Floating Point Register Precision Control App 20110004644 - Henry; G. Glenn ; et al.	2011-01-06
Data Cache With Modified Bit Array App 20100306478 - Hooker; Rodney E. ; et al.	2010-12-02
Out-of-order Execution Microprocessor With Reduced Store Collision Load Replay Reduction App 20100306509 - Day; Matthew Daniel ; et al.	2010-12-02
Microprocessor With Selective Out-of-order Branch Execution App 20100306506 - Hooker; Rodney E. ; et al.	2010-12-02
Out-of-order Execution Microprocessor With Reduced Store Collision Load Replay Reduction App 20100306507 - Day; Matthew Daniel ; et al.	2010-12-02
Data Cache With Modified Bit Array App 20100306475 - Hooker; Rodney E. ; et al.	2010-12-02
Out-of-order Execution Microprocessor With Reduced Store Collision Load Replay Reduction App 20100306508 - Day; Matthew Daniel ; et al.	2010-12-02
Guaranteed Prefetch Instruction App 20100306503 - Henry; G. Glenn ; et al.	2010-12-02
Low Power High Speed Load-store Collision Detector App 20100299484 - Hooker; Rodney E. ; et al.	2010-11-25
Microprocessor with private microcode RAM Grant 7,827,390 - Henry , et al. November 2, 2	2010-11-02
Prefetching Of Next Physically Sequential Cache Line After Cache Line That Includes Loaded Page Table Entry App 20100250859 - Hooker; Rodney E. ; et al.	2010-09-30
Out-of-order Execution Microprocessor That Speculatively Executes Dependent Memory Access Instructions By Predicting No Value Change By Older Instructions That Load A Segment Register App 20100205406 - Hooker; Rodney E. ; et al.	2010-08-12
Microprocessor With Fused Store Address/store Data Microinstruction App 20100070741 - Col; Gerard M. ; et al.	2010-03-18
Microprocessor Cache Line Evict Array App 20100064107 - Eddy; Colin ; et al.	2010-03-11
Microprocessor That Performs Store Forwarding Based On Comparison Of Hashed Address Bits App 20100049952 - Eddy; Colin ; et al.	2010-02-25
Microprocessor That Performs Speculative Tablewalks App 20100011188 - Eddy; Colin ; et al.	2010-01-14
Microprocessor With Multiple Operating Modes Dynamically Configurable By A Device Driver Based On Currently Running Applications App 20100011198 - Hooker; Rodney E. ; et al.	2010-01-14
Suppression of store checking Grant 7,647,478 - Henry , et al. January 12, 2	2010-01-12
Non-temporal memory reference control mechanism Grant 7,647,479 - Henry , et al. January 12, 2	2010-01-12
Microprocessor With Microarchitecture For Efficiently Executing Read/modify/write Memory Operand Instructions App 20090204800 - Hooker; Rodney E. ; et al.	2009-08-13
Microprocessor, apparatus and method for selective prefetch retire Grant 7,562,192 - Henry , et al. July 14, 2	2009-07-14
Apparatus and method for extending a microprocessor instruction set Grant 7,543,134 - Henry , et al. June 2, 2	2009-06-02
Apparatus and method for instruction-level specification of floating point format Grant 7,529,912 - Henry , et al. May 5, 2	2009-05-05
Microprocessor With Private Microcode Ram App 20080256336 - Henry; G. Glenn ; et al.	2008-10-16
Apparatus and method for extending data modes in a microprocessor Grant 7,395,412 - Henry , et al. July 1, 2	2008-07-01
Microprocessor, apparatus and method for selective prefetch retire Grant 7,383,394 - Henry , et al. June 3, 2	2008-06-03
Apparatus and method for selective control of results write back Grant 7,380,103 - Henry , et al. May 27, 2	2008-05-27
Apparatus and method for providing extended address modes in an existing instruction set for a microprocessor Grant 7,380,109 - Henry , et al. May 27, 2	2008-05-27
Mechanism for extending the number of registers in a microprocessor Grant 7,373,483 - Henry , et al. May 13, 2	2008-05-13
Non-temporal memory reference control mechanism Grant 7,328,328 - Henry , et al. February 5, 2	2008-02-05
Apparatus and method for selective memory attribute control Grant 7,315,921 - Henry , et al. January 1, 2	2008-01-01
Microprocessor and method for utilizing disparity between bus clock and core clock frequencies to prioritize cache line fill bus access requests Grant 7,313,658 - Henry , et al. December 25, 2	2007-12-25
Suppression of store checking Grant 7,302,551 - Henry , et al. November 27, 2	2007-11-27
Non-temporal Memory Reference Control Mechanism App 20070234008 - Henry; G. Glenn ; et al.	2007-10-04
Suppression Of Store Checking App 20070234010 - HENRY; G. GLENN ; et al.	2007-10-04
Store-induced instruction coherency mechanism Grant 7,263,585 - Hooker August 28, 2	2007-08-28
Microprocessor with repeat prefetch instruction Grant 7,234,025 - Hooker June 19, 2	2007-06-19
Microprocessor, Apparatus And Method For Selective Prefetch Retire App 20070083714 - Henry; G. Glenn ; et al.	2007-04-12
Microprocessor with variable latency stack cache Grant 7,191,291 - Hooker March 13, 2	2007-03-13
Apparatus and method for performing a detached load operation in a pipeline microprocessor Grant 7,191,320 - Hooker , et al. March 13, 2	2007-03-13
Apparatus and method for selective control of condition code write back Grant 7,185,180 - Henry , et al. February 27, 2	2007-02-27
Apparatus and method for extending a microprocessor instruction set Grant 7,181,596 - Henry , et al. February 20, 2	2007-02-20
Apparatus and method for conditional instruction execution Grant 7,155,598 - Henry , et al. December 26, 2	2006-12-26
Microprocessor and apparatus for performing fast speculative pop operation from a stack memory cache Grant 7,139,876 - Hooker November 21, 2	2006-11-21
Microprocessor and apparatus for performing speculative load operation from a stack memory cache Grant 7,139,877 - Hooker November 21, 2	2006-11-21
Fast POP operation from RAM cache using cache row value stack Grant 7,136,990 - Hooker November 14, 2	2006-11-14
Method and apparatus for resolving additional load misses in a single pipeline processor under stalls of instructions not accessing memory-mapped I/O regions Grant 7,133,968 - Gaskins , et al. November 7, 2	2006-11-07
Microprocessor apparatus and method for exclusively prefetching a block of cache lines from memory Grant 7,089,368 - Hooker August 8, 2	2006-08-08
Microprocessor apparatus and method for prefetch, allocation, and initialization of a block of cache lines from memory Grant 7,089,371 - Hooker August 8, 2	2006-08-08
Microprocessor apparatus and method for prefetch, allocation, and initialization of a cache line from memory Grant 7,080,211 - Hooker July 18, 2	2006-07-18
Write back and invalidate mechanism for multiple cache lines Grant 7,000,081 - Hooker February 14, 2	2006-02-14
Microprocessor and method for utilizing disparity between bus clock and core clock frequencies to prioritize cache line fill bus access requests App 20060031640 - Henry; G. Glenn ; et al.	2006-02-09
Microprocessor and method for utilizing disparity between bus clock and core clock frequencies to prioritize cache line fill bus access requests Grant 6,985,999 - Henry , et al. January 10, 2	2006-01-10
Microprocessor, apparatus and method for selective prefetch retire App 20050278485 - Henry, G. Glenn ; et al.	2005-12-15
Apparatus and method for instruction-level specification of floating point format App 20050188179 - Henry, G. Glenn ; et al.	2005-08-25
Apparatus and method for extending a microprocessor instruction set App 20050102492 - Henry, G. Glenn ; et al.	2005-05-12
Microprocessor with repeat prefetch instruction App 20050080997 - Hooker, Rodney E.	2005-04-14
Tagged address stack and microprocessor using same Grant 6,862,670 - Henry , et al. March 1, 2	2005-03-01
Microprocessor with repeat prefetch instruction Grant 6,832,296 - Hooker December 14, 2	2004-12-14
Microprocessor and method for performing selective prefetch based on bus activity level Grant 6,810,466 - Henry , et al. October 26, 2	2004-10-26
Microprocessor and apparatus for performing fast pop operation from random access cache memory App 20040177232 - Hooker, Rodney E.	2004-09-09
Apparatus and method for performing a detached load operation in a pipeline microprocessor App 20040172521 - Hooker, Rodney E. ; et al.	2004-09-02
Microprocessor with variable latency stack cache App 20040162947 - Hooker, Rodney E.	2004-08-19
Cache data block allocation and initialization mechanism App 20040158682 - Hooker, Rodney E.	2004-08-12
Write back and invalidate mechanism for multiple cache lines App 20040158681 - Hooker, Rodney E.	2004-08-12
Prefetch with intent to store mechanism for block memory App 20040158679 - Hooker, Rodney E.	2004-08-12
Apparatus and method for allocation and initialization of a cache line App 20040158680 - Hooker, Rodney E.	2004-08-12
Microprocessor and apparatus for performing fast speculative pop operation from a stack memory cache App 20040148467 - Hooker, Rodney E.	2004-07-29
Microprocessor and apparatus for performing speculative load operation from a stack memory cache App 20040148468 - Hooker, Rodney E.	2004-07-29
Store-induced instruction coherency mechanism App 20040068618 - Hooker, Rodney E.	2004-04-08
Translation lookaside buffer that caches memory type information Grant 6,681,311 - Gaskins , et al. January 20, 2	2004-01-20
Method and apparatus for store forwarding using a response buffer data path in a write-allocate-configurable microprocessor Grant 6,675,287 - Gaskins , et al. January 6, 2	2004-01-06
Selective interrupt suppression App 20030221091 - Henry, Glenn ; et al.	2003-11-27
Compare branch instruction pairing within a single integer pipeline Grant 6,647,489 - Col , et al. November 11, 2	2003-11-11
Apparatus and method for extending address modes in a microprocessor App 20030196077 - Henry, G. Glenn ; et al.	2003-10-16
Microprocessor with repeat prefetch instruction App 20030191900 - Hooker, Rodney E.	2003-10-09
Apparatus and method for selective control of condition code write back App 20030188133 - Henry, G. Glenn ; et al.	2003-10-02
Mechanism for extending the number of registers in a microprocessor App 20030188130 - Henry, G. Glenn ; et al.	2003-10-02
Suppression of store checking App 20030188131 - Henry, G. Glenn ; et al.	2003-10-02
Apparatus and method for selective control of results write back App 20030188129 - Henry, G. Glenn ; et al.	2003-10-02
Apparatus and method for conditional instruction execution App 20030188140 - Henry, G. Glenn ; et al.	2003-10-02
Virtual set cache that redirects store data to correct virtual set to avoid virtual set store miss penalty Grant 6,622,211 - Henry , et al. September 16, 2	2003-09-16
Apparatus and method for extending data modes in a microprocessor App 20030172252 - Henry, G. Glenn ; et al.	2003-09-11
Non-temporal memory reference control mechanism App 20030159020 - Henry, G. Glenn ; et al.	2003-08-21
Apparatus and method for selective memory attribute control App 20030159009 - Henry, G. Glenn ; et al.	2003-08-21
Method and apparatus for speculative microinstruction pairing Grant 6,609,191 - Hooker , et al. August 19, 2	2003-08-19
Apparatus and method for extending a microprocessor instruction set App 20030154359 - Henry, G. Glenn ; et al.	2003-08-14
Apparatus and method for speculatively forwarding storehit data based on physical page index compare Grant 6,581,151 - Henry , et al. June 17, 2	2003-06-17
Microprocessor and method for utilizing disparity between bus clock and core clock frequencies to prioritize cache line fill bus access requests App 20030093636 - Henry, G. Glenn ; et al.	2003-05-15
Microprocessor and method for performing selective prefetch based on bus activity level App 20030088740 - Henry, G. Glenn ; et al.	2003-05-08
Tagged address stack and microprocessor using same App 20030079115 - Henry, G. Glenn ; et al.	2003-04-24
Method and apparatus for resolving additional load misses and page table walks under orthogonal stalls in a single pipeline processor Grant 6,549,985 - Gaskins , et al. April 15, 2	2003-04-15
Virtual set cache that redirects store data to correct virtual set to avoid virtual set store miss penalty App 20030037201 - Henry, G. Glenn ; et al.	2003-02-20
Apparatus and method for performing write-combining in a pipelined microprocessor using tags App 20030033491 - Henry, G. Glenn ; et al.	2003-02-13
Translation lookaside buffer that caches memory type information App 20030018877 - Gaskins, Darius D. ; et al.	2003-01-23
Apparatus and method for speculatively forwarding storehit data based on physical page index compare App 20030018875 - Henry, G. Glenn ; et al.	2003-01-23
Method and apparatus for resolving additional load misses and page table walks under orthogonal stalls in a single pipeline processor App 20030009622 - Gaskins, Darius D. ; et al.	2003-01-09