Honma; Ryoichi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Honma; Ryoichi.The latest application filed is for "method of making three-dimensional semiconductor memory device having uniform thickness semiconductor channel".

Company Profile

0.11.10

Honma; Ryoichi - Yokkaichi JP
Honma; Ryoichi - Tokkaichi JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method of making three-dimensional semiconductor memory device having laterally undulating memory films Grant 9,978,768 - Xu , et al. May 22, 2	2018-05-22
Method Of Making Three-dimensional Semiconductor Memory Device Having Uniform Thickness Semiconductor Channel App 20180006041 - XU; Jiyin ; et al.	2018-01-04
Honeycomb cell structure three-dimensional non-volatile memory device Grant 9,812,461 - Doda , et al. November 7, 2	2017-11-07
Three dimensional memory device having well contact pillar and method of making thereof Grant 9,768,186 - Shimabukuro , et al. September 19, 2	2017-09-19
Passive devices for integration with three-dimensional memory devices Grant 9,646,981 - Nishikawa , et al. May 9, 2	2017-05-09
Blocking oxide in memory opening integration scheme for three-dimensional memory structure Grant 9,601,508 - Sel , et al. March 21, 2	2017-03-21
Passive devices for integration with three-dimensional memory devices Grant 9,589,981 - Nishikawa , et al. March 7, 2	2017-03-07
Method of making a monolithic three dimensional NAND string using a select gate etch stop layer Grant 9,548,313 - Yada , et al. January 17, 2	2017-01-17
Metallic etch stop layer in a three-dimensional memory structure Grant 9,530,788 - Oginoe , et al. December 27, 2	2016-12-27
Batch contacts for multiple electrically conductive layers Grant 9,530,787 - Tsutsumi , et al. December 27, 2	2016-12-27
Passive Devices For Integration With Three-dimensional Memory Devices App 20160365352 - NISHIKAWA; Masatoshi ; et al.	2016-12-15
Passive Devices For Integration With Three-dimensional Memory Devices App 20160365351 - NISHIKAWA; Masatoshi ; et al.	2016-12-15
Three Dimensional Memory Device Having Well Contact Pillar And Method Of Making Thereof App 20160329341 - Shimabukuro; Seiji ; et al.	2016-11-10
Self-aligned integrated line and via structure for a three-dimensional semiconductor device Grant 9,484,296 - Takahashi , et al. November 1, 2	2016-11-01
Blocking Oxide In Memory Opening Integration Scheme For Three-dimensional Memory Structure App 20160315095 - Sel; Jongsun ; et al.	2016-10-27
Metallic Etch Stop Layer In A Three-dimensional Memory Structure App 20160276359 - OGINOE; Tomohiro ; et al.	2016-09-22
Honeycomb Cell Structure Three-dimensional Non-volatile Memory Device App 20160276360 - DODA; Yasushi ; et al.	2016-09-22
Self-aligned Integrated Line And Via Structure For A Three-dimensional Semiconductor Device App 20160240476 - TAKAHASHI; Akihide ; et al.	2016-08-18
Three dimensional memory device having well contact pillar and method of making thereof Grant 9,412,749 - Shimabukuro , et al. August 9, 2	2016-08-09
Batch Contacts For Multiple Electrically Conductive Layers App 20160111438 - TSUTSUMI; Masanori ; et al.	2016-04-21
Method Of Making A Monolithic Three Dimensional Nand String Using A Select Gate Etch Stop Layer App 20150348984 - YADA; Shinsuke ; et al.	2015-12-03

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.