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Patent applications and USPTO patent grants for Hong; Se J..The latest application filed is for "high speed machine for the physical design of very large scale integrated circuits".
Patent | Date |
---|---|
Simultaneous placement and wiring for VLSI chips Grant 4,593,363 - Burstein , et al. June 3, 1 | 1986-06-03 |
High speed machine for the physical design of very large scale integrated circuits Grant 4,593,351 - Hong , et al. June 3, 1 | 1986-06-03 |
Method and apparatus for determining minimum/maximum of multiple data words Grant 4,539,549 - Hong , et al. September 3, 1 | 1985-09-03 |
High speed machine for the physical design of very large scale integrated circuits Grant 4,484,292 - Hong , et al. November 20, 1 | 1984-11-20 |
Plural channel error correcting apparatus and methods Grant RE30,187 - Hong , et al. January 8, 1 | 1980-01-08 |
Array device for data scrambling Grant 4,177,355 - Fleisher , et al. December 4, 1 | 1979-12-04 |
Logic array with testing circuitry Grant 3,958,110 - Hong , et al. May 18, 1 | 1976-05-18 |
Data coding circuits for encoded waveform with constrained charge accumulation Grant 3,906,485 - Hong , et al. September 16, 1 | 1975-09-16 |
Plural channel error correcting apparatus and methods Grant 3,868,632 - Hong , et al. February 25, 1 | 1975-02-25 |
Modular Distributed Error Detection And Correction Apparatus And Method Grant 3,825,893 - Bossen , et al. July 23, 1 | 1974-07-23 |
Shift Register Error Correcting System Grant 3,745,526 - Hong , et al. July 10, 1 | 1973-07-10 |
Error Correcting System Grant 3,745,525 - Hong , et al. July 10, 1 | 1973-07-10 |
Double Error Correcting Method And System Grant 3,714,629 - Hong , et al. January 30, 1 | 1973-01-30 |
Error Detection Circuit For Decoders Grant 3,693,152 - Hong September 19, 1 | 1972-09-19 |
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