loadpatents
Patent applications and USPTO patent grants for Hong; Nam Pyo.The latest application filed is for "tray for carrying display panel".
Patent | Date |
---|---|
Tray with buffering members for carrying display panel Grant 10,906,718 - Sim , et al. February 2, 2 | 2021-02-02 |
Tray For Carrying Display Panel App 20200122913 - SIM; Bo Bae ;   et al. | 2020-04-23 |
Electrostatic protection circuit and semiconductor device including the same Grant 9,846,194 - Hong December 19, 2 | 2017-12-19 |
Electrostatic Protection Circuit And Semiconductor Device Including The Same App 20160238632 - HONG; Nam Pyo | 2016-08-18 |
Substrate storage container Grant 9,376,251 - Hong , et al. June 28, 2 | 2016-06-28 |
Integrated Circuits App 20160056796 - HONG; Nam Pyo | 2016-02-25 |
Substrate Storage Container App 20150041361 - HONG; Nam-Pyo ;   et al. | 2015-02-12 |
Multi-chip Semiconductor Apparatus App 20140124953 - JEON; Byung Deuk ;   et al. | 2014-05-08 |
Multi-chip Semiconductor Apparatus App 20130249107 - JEON; Byung Deuk ;   et al. | 2013-09-26 |
Clock signal generation circuit Grant 8,514,003 - Hong August 20, 2 | 2013-08-20 |
Clock Signal Generation Circuit App 20120249201 - HONG; Nam Pyo | 2012-10-04 |
Delay locked loop circuit Grant 8,049,544 - Hong , et al. November 1, 2 | 2011-11-01 |
Signal amplification apparatus with advanced linearization Grant 7,940,126 - Choi , et al. May 10, 2 | 2011-05-10 |
Apparatus and method of generating reference clock for DLL circuit Grant 7,902,899 - Hong March 8, 2 | 2011-03-08 |
Signal Amplification Apparatus With Advanced Linearization App 20110018636 - CHOI; Young-Wan ;   et al. | 2011-01-27 |
Delay Locked Loop Circuit App 20110001526 - Hong; Nam-Pyo ;   et al. | 2011-01-06 |
Multi-stage Differential Amplification Circuit And Input Buffer For Semiconductor Device App 20100295589 - Hong; Nam-Pyo | 2010-11-25 |
Apparatus And Method Of Generating Reference Clock For Dll Circuit App 20100253407 - HONG; NAM PYO | 2010-10-07 |
Apparatus and method of generating reference clock for DLL circuit Grant 7,768,333 - Hong August 3, 2 | 2010-08-03 |
Apparatus and method of generating reference clock for DLL circuit App 20080036518 - Hong; Nam Pyo | 2008-02-14 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.