loadpatents
Patent applications and USPTO patent grants for Hong; Merit Y..The latest application filed is for "clock conditioning circuit".
Patent | Date |
---|---|
Clock conditioning circuit Grant 7,898,353 - Hong , et al. March 1, 2 | 2011-03-01 |
Switched-capacitor circuits, integration systems, and methods of operation thereof Grant 7,880,653 - Hong , et al. February 1, 2 | 2011-02-01 |
Digitally adjustable quantization circuit Grant 7,852,253 - Bien , et al. December 14, 2 | 2010-12-14 |
Clock Conditioning Circuit App 20100289538 - Hong; Merit Y. ;   et al. | 2010-11-18 |
Techniques for delay compensation of continuous-time sigma-delta modulators Grant 7,834,787 - Hong November 16, 2 | 2010-11-16 |
Digitally Adjustable Quantization Circuit App 20100207797 - Bien; David E. ;   et al. | 2010-08-19 |
Switched-capacitor Circuits, Integration Systems, And Methods Of Operation Thereof App 20100194612 - Hong; Merit Y. ;   et al. | 2010-08-05 |
Techniques for Delay Compensation of Continuous-Time Sigma-Delta Modulators App 20100171643 - Hong; Merit Y. | 2010-07-08 |
Sigma-delta modulator Grant 7,443,325 - Hong October 28, 2 | 2008-10-28 |
Sigma-delta modulator App 20080068241 - Hong; Merit Y. | 2008-03-20 |
System and method for operating a feedback network Grant 7,323,931 - Hong , et al. January 29, 2 | 2008-01-29 |
Integrator current matching Grant 7,315,268 - Hong January 1, 2 | 2008-01-01 |
Integrator Current Matching App 20070290896 - Hong; Merit Y. | 2007-12-20 |
System and method for operating a feedback network App 20070222510 - Hong; Merit Y. ;   et al. | 2007-09-27 |
Double-sampled integrator system and method thereof Grant 7,068,198 - Hong , et al. June 27, 2 | 2006-06-27 |
Double-sampled integrator system and method thereof App 20050275580 - Hong, Merit Y. ;   et al. | 2005-12-15 |
Switched capacitor circuit and method for reducing sampling noise Grant 6,147,551 - Hong November 14, 2 | 2000-11-14 |
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