| Patent | Date |
|---|
Silicon-on-insulator chip structure with substrate-embedded optical waveguide and method
Grant 11,448,822 - Holt , et al. September 20, 2 | 2022-09-20 |
Extended shallow trench isolation for ultra-low leakage in fin-type lateral bipolar junction transistor devices
Grant 11,424,349 - Malinowski , et al. August 23, 2 | 2022-08-23 |
Extended Shallow Trench Isolation For Ultra-low Leakage In Fin-type Lateral Bipolar Junction Transistor Devices
App 20220262931 - Malinowski; Arkadiusz ; et al. | 2022-08-18 |
Bipolar Junction Transistors With A Wraparound Base Layer
App 20220262930 - Jain; Vibhor ; et al. | 2022-08-18 |
Silicon-on-insulator Chip Structure With Substrate-embedded Optical Waveguide And Method
App 20220196909 - Holt; Judson R. ; et al. | 2022-06-23 |
Three part source/drain region structure for transistor
Grant 11,329,158 - Wang , et al. May 10, 2 | 2022-05-10 |
Limiting lateral epitaxy growth at N-P boundary using inner spacer, and related structure
Grant 11,217,584 - Holt , et al. January 4, 2 | 2022-01-04 |
Heterojunction bipolar transistor with marker layer
Grant 11,217,685 - Ho , et al. January 4, 2 | 2022-01-04 |
Methods Of Protecting Semiconductor Materials In The Active Region Of A Transistor Device And The Resulting Transistor Device
App 20210399126 - Gu; Sipeng ; et al. | 2021-12-23 |
Heterojunction bipolar transistors
Grant 11,195,925 - Holt , et al. December 7, 2 | 2021-12-07 |
Heterojunction bipolar transistor
Grant 11,177,347 - Holt , et al. November 16, 2 | 2021-11-16 |
Semiconductor manufactured nano-structures for microbe or virus trapping or destruction
Grant 11,150,168 - Astier , et al. October 19, 2 | 2021-10-19 |
Three Part Source/drain Region Structure For Transistor
App 20210320207 - Wang; Haiting ; et al. | 2021-10-14 |
Heterojunction bipolar transistor
Grant 11,145,725 - Liu , et al. October 12, 2 | 2021-10-12 |
Transistor structure with overlying gate on polysilicon gate structure and related method
Grant 11,127,831 - Liu , et al. September 21, 2 | 2021-09-21 |
Source/drain regions for transistor devices and methods of forming same
Grant 11,094,822 - Malinowski , et al. August 17, 2 | 2021-08-17 |
Junction field effect transistor (JFET) structure and methods to form same
Grant 11,094,834 - Liu , et al. August 17, 2 | 2021-08-17 |
FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth
Grant 11,081,583 - Harley , et al. August 3, 2 | 2021-08-03 |
Novel Source/drain Regions For Transistor Devices And Methods Of Forming Same
App 20210234045 - Malinowski; Arkadiusz ; et al. | 2021-07-29 |
LDMOS integrated circuit product
Grant 11,075,298 - Shu , et al. July 27, 2 | 2021-07-27 |
Semiconductor manufactured nano-structures for microbe or virus trapping or destruction
Grant 11,060,960 - Astier , et al. July 13, 2 | 2021-07-13 |
Epi semiconductor material structures in source/drain regions of a transistor device formed on an SOI substrate
Grant 11,049,955 - Pandey , et al. June 29, 2 | 2021-06-29 |
Silicided gate structures
Grant 11,031,484 - Mulfinger , et al. June 8, 2 | 2021-06-08 |
Structure And Method For Random Code Generation
App 20210141610 - Holt; Judson R. ; et al. | 2021-05-13 |
Limiting Lateral Epitaxy Growth At N-p Boundary Using Inner Spacer, And Related Structure
App 20210125984 - Holt; Judson R. ; et al. | 2021-04-29 |
Junction Field Effect Transistor (jfet) Structure And Methods To Form Same
App 20210091236 - Liu; Qizhi ; et al. | 2021-03-25 |
Heterojunction Bipolar Transistor
App 20210091183 - HOLT; Judson R. ; et al. | 2021-03-25 |
Heterojunction Bipolar Transistor With Marker Layer
App 20210091214 - HO; Herbert ; et al. | 2021-03-25 |
Heterojunction Bipolar Transistors
App 20210091195 - HOLT; Judson R. ; et al. | 2021-03-25 |
Transistor Structure With Overlying Gate On Polysilicon Gate Structure And Related Method
App 20210091200 - Liu; Qizhi ; et al. | 2021-03-25 |
Heterojunction Bipolar Transistor
App 20210091189 - LIU; Qizhi ; et al. | 2021-03-25 |
Differential Silicide Structures
App 20200411666 - MULFINGER; George R. ; et al. | 2020-12-31 |
Methods Of Forming An Ldmos Device And The Resulting Integrated Circuit Product
App 20200411684 - Shu; Jiehui ; et al. | 2020-12-31 |
Faceted epitaxial source/drain regions
Grant 10,756,184 - Mulfinger , et al. A | 2020-08-25 |
Self-aligned sacrificial epitaxial capping for trench silicide
Grant 10,741,556 - Mulfinger , et al. A | 2020-08-11 |
Semiconductor Manufactured Nano-structures For Microbe Or Virus Trapping Or Destruction
App 20200141845 - Astier; Yann ; et al. | 2020-05-07 |
Faceted Epitaxial Source/drain Regions
App 20200144365 - MULFINGER; George R. ; et al. | 2020-05-07 |
Novel Epi Semiconductor Material Structures In Source/drain Regions Of A Transistor Device Formed On An Soi Substrate
App 20200135895 - Pandey; Shesh Mani ; et al. | 2020-04-30 |
FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth
Grant 10,615,279 - Harley , et al. | 2020-04-07 |
Finfet With Dielectric Isolation After Gate Module For Improved Source And Drain Region Epitaxial Growth
App 20200066908 - HARLEY; ERIC C. ; et al. | 2020-02-27 |
Semiconductor manufactured nano-structures for microbe or virus trapping or destruction
Grant 10,557,779 - Astier , et al. Feb | 2020-02-11 |
Semiconductor Manufactured Nano-structures For Microbe Or Virus Trapping Or Destruction
App 20190310171 - Astier; Yann ; et al. | 2019-10-10 |
Semiconductor manufactured nano-structures for microbe or virus trapping or destruction
Grant 10,393,635 - Astier , et al. A | 2019-08-27 |
Integrated circuit structure including laterally recessed source/drain epitaxial region and method of forming same
Grant 10,396,078 - Holt , et al. A | 2019-08-27 |
Methods of forming a gate-to-source/drain contact structure
Grant 10,388,654 - Holt , et al. A | 2019-08-20 |
Methods Of Forming A Gate-to-source/drain Contact Structure
App 20190214387 - Holt; Judson R. ; et al. | 2019-07-11 |
Boundary spacer structure and integration
Grant 10,262,903 - Holt , et al. | 2019-04-16 |
Semiconductor manufactured nano-structures for microbe or virus trapping or destruction
Grant 10,246,730 - Astier , et al. | 2019-04-02 |
FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth
Grant 10,243,077 - Harley , et al. | 2019-03-26 |
Methods Of Forming Epi Semiconductor Material In Source/drain Regions Of A Transistor Device Formed On An Soi Substrate
App 20190088766 - Pandey; Shesh Mani ; et al. | 2019-03-21 |
Strain retention semiconductor member for channel SiGe layer of pFET
Grant 10,236,343 - Triyoso , et al. | 2019-03-19 |
Methods, apparatus and system for forming increased surface regions within EPI structures for improved trench silicide
Grant 10,204,984 - Stoker , et al. Feb | 2019-02-12 |
Methods, Apparatus And System For Forming Increased Surface Regions Within Epi Structures For Improved Trench Silicide
App 20190043944 - Stoker; Matthew W. ; et al. | 2019-02-07 |
Boundary Spacer Structure And Integration
App 20180374759 - HOLT; Judson R. ; et al. | 2018-12-27 |
Integrated Circuit Structure Including Laterally Recessed Source/drain Epitaxial Region And Method Of Forming Same
App 20180286863 - Holt; Judson R. ; et al. | 2018-10-04 |
Self-aligned Sacrificial Epitaxial Capping For Trench Silicide
App 20180233505 - MULFINGER; George R. ; et al. | 2018-08-16 |
Asymmetric semiconductor device and method of forming same
Grant 10,049,942 - Chou , et al. August 14, 2 | 2018-08-14 |
Integrated circuit structure including laterally recessed source/drain epitaxial region and method of forming same
Grant 10,020,307 - Holt , et al. July 10, 2 | 2018-07-10 |
STRAIN RETENTION SEMICONDUCTOR MEMBER FOR CHANNEL SiGe LAYER OF pFET
App 20180190768 - Triyoso; Dina H. ; et al. | 2018-07-05 |
Forming zig-zag trench structure to prevent aspect ratio trapping defect escape
Grant 9,947,532 - Holt , et al. April 17, 2 | 2018-04-17 |
Finfet With Dielectric Isolation After Gate Module For Improved Source And Drain Region Epitaxial Growth
App 20180097113 - HARLEY; ERIC C. ; et al. | 2018-04-05 |
Junction butting structure using nonuniform trench shape
Grant 9,923,082 - Chou , et al. March 20, 2 | 2018-03-20 |
FinFET with dielectric isolation after gate module for improved source and drain region epitaxial growth
Grant 9,917,190 - Harley , et al. March 13, 2 | 2018-03-13 |
Recess liner for silicon germanium fin formation
Grant 9,893,154 - McArdle , et al. February 13, 2 | 2018-02-13 |
Self-aligned sacrificial epitaxial capping for trench silicide
Grant 9,812,453 - Mulfinger , et al. November 7, 2 | 2017-11-07 |
Recess Liner For Silicon Germanium Fin Formation
App 20170294515 - MCARDLE; Timothy J. ; et al. | 2017-10-12 |
Buffer layer for modulating Vt across devices
Grant 9,722,045 - Chandra , et al. August 1, 2 | 2017-08-01 |
Semiconductor Manufactured Nano-structures For Microbe Or Virus Trapping Or Destruction
App 20170191106 - Astier; Yann ; et al. | 2017-07-06 |
Semiconductor manufactured nano-structures for microbe or virus trapping or destruction
App 20170191912 - Astier; Yann ; et al. | 2017-07-06 |
Semiconductor Manufactured Nano-structures For Microbe Or Virus Trapping Or Destruction
App 20170189570 - Astier; Yann ; et al. | 2017-07-06 |
Semiconductor Manufactured Nano-structures For Microbe Or Virus Trapping Or Destruction
App 20170191913 - Astier; Yann ; et al. | 2017-07-06 |
Recess liner for silicon germanium fin formation
Grant 9,698,226 - McArdle , et al. July 4, 2 | 2017-07-04 |
Semiconductor Structure Having Silicon Germanium Fins And Method Of Fabricating Same
App 20170179127 - Holt; Judson R. ; et al. | 2017-06-22 |
Junction Butting Structure Using Nonuniform Trench Shape
App 20170179257 - Chou; Anthony I. ; et al. | 2017-06-22 |
Zig-zag Trench Structure To Prevent Aspect Ratio Trapping Defect Escape
App 20170148661 - Holt; Judson R. ; et al. | 2017-05-25 |
BUFFER LAYER FOR MODULATING Vt ACROSS DEVICES
App 20170117387 - Chandra; Bhupesh ; et al. | 2017-04-27 |
Junction butting structure using nonuniform trench shape
Grant 9,627,480 - Chou , et al. April 18, 2 | 2017-04-18 |
Zig-zag trench structure to prevent aspect ratio trapping defect escape
Grant 9,601,565 - Holt , et al. March 21, 2 | 2017-03-21 |
Asymmetric Semiconductor Device And Method Of Forming Same
App 20170076991 - Chou; Anthony I. ; et al. | 2017-03-16 |
FinFET and nanowire semiconductor devices with suspended channel regions and gate structures surrounding the suspended channel regions
Grant 9,577,100 - Cheng , et al. February 21, 2 | 2017-02-21 |
Methods Of Forming Replacement Fins Comprised Of Multiple Layers Of Different Semiconductor Materials
App 20170033181 - McArdle; Timothy J. ; et al. | 2017-02-02 |
Epitaxial growth of material on source/drain regions of FinFET structure
Grant 9,536,985 - Chudzik , et al. January 3, 2 | 2017-01-03 |
Trapping dislocations in high-mobility fins below isolation layer
Grant 9,524,986 - Chudzik , et al. December 20, 2 | 2016-12-20 |
Uniform junction formation in FinFETs
Grant 9,466,616 - Harley , et al. October 11, 2 | 2016-10-11 |
Defect reduction with rotated double aspect ratio trapping
Grant 9,443,940 - Fogel , et al. September 13, 2 | 2016-09-13 |
Method for embedded diamond-shaped stress element
Grant 9,412,843 - Harley , et al. August 9, 2 | 2016-08-09 |
Method for fabricating semiconductor device
Grant 9,412,842 - Kim , et al. August 9, 2 | 2016-08-09 |
Finfet With Dielectric Isolation After Gate Module For Improved Source And Drain Region Epitaxial Growth
App 20160197186 - HARLEY; ERIC C. ; et al. | 2016-07-07 |
Uniform Junction Formation In Finfets
App 20160181285 - Harley; Eric C.T. ; et al. | 2016-06-23 |
Zig-zag Trench Structure To Prevent Aspect Ratio Trapping Defect Escape
App 20160181359 - Holt; Judson R. ; et al. | 2016-06-23 |
Epitaxially Grown Silicon Germanium Channel Finfet With Silicon Underlayer
App 20160163707 - Cheng; Kangguo ; et al. | 2016-06-09 |
Uniform junction formation in FinFETs
Grant 9,318,608 - Harley , et al. April 19, 2 | 2016-04-19 |
finFET with dielectric isolation after gate module for improved source and drain region epitaxial growth
Grant 9,312,364 - Harley , et al. April 12, 2 | 2016-04-12 |
Epitaxial Growth Of Material On Source/drain Regions Of Finfet Structure
App 20160093720 - Chudzik; Michael P. ; et al. | 2016-03-31 |
Uniform Junction Formation In Finfets
App 20160093740 - Harley; Eric C. T. ; et al. | 2016-03-31 |
Self aligned device with enhanced stress and methods of manufacture
Grant 9,293,593 - Holt , et al. March 22, 2 | 2016-03-22 |
Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levels
Grant 9,287,399 - Chandra , et al. March 15, 2 | 2016-03-15 |
Epitaxially grown silicon germanium channel FinFET with silicon underlayer
Grant 9,287,264 - Cheng , et al. March 15, 2 | 2016-03-15 |
Finfet With Dielectric Isolation After Gate Module For Improved Source And Drain Region Epitaxial Growth
App 20160035878 - HARLEY; ERIC C. ; et al. | 2016-02-04 |
Graphene transistor with a sublithographic channel width
Grant 9,236,477 - Chu , et al. January 12, 2 | 2016-01-12 |
FinFET device containing a composite spacer structure
Grant 9,236,397 - Holt , et al. January 12, 2 | 2016-01-12 |
Trapping Dislocations In High-mobility Fins Below Isolation Layer
App 20150380438 - Chudzik; Michael P. ; et al. | 2015-12-31 |
Junction Butting Structure Using Nonuniform Trench Shape
App 20150380488 - Chou; Anthony I. ; et al. | 2015-12-31 |
Finfet And Nanowire Semiconductor Devices With Suspended Channel Regions And Gate Structures Surrounding The Suspended Channel Regions
App 20150364603 - Cheng; Kangguo ; et al. | 2015-12-17 |
Finfet With Dielectric Isolation After Gate Module For Improved Source And Drain Region Epitaxial Growth
App 20150349093 - Harley; ERIC C. ; et al. | 2015-12-03 |
Method For Embedded Diamond-shaped Stress Element
App 20150340465 - Harley; Eric C. ; et al. | 2015-11-26 |
Single-crystal Source-drain Merged By Polycrystalline Material
App 20150270332 - Harley; Eric C. ; et al. | 2015-09-24 |
Single crystal source-drain merged by polycrystalline material
Grant 9,123,826 - Harley , et al. September 1, 2 | 2015-09-01 |
Graphene Transistor With A Sublithographic Channel Width
App 20150236147 - Chu; Jack O. ; et al. | 2015-08-20 |
FinFET DEVICE CONTAINING A COMPOSITE SPACER STRUCTURE
App 20150221676 - Holt; Judson R. ; et al. | 2015-08-06 |
Pre-gate, source/drain strain layer formation
Grant 9,059,286 - Holt , et al. June 16, 2 | 2015-06-16 |
Structure and method for mobility enhanced MOSFETs with unalloyed silicide
Grant 9,059,316 - Liu , et al. June 16, 2 | 2015-06-16 |
Halo Region Formation By Epitaxial Growth
App 20150145033 - Adam; Thomas N. ; et al. | 2015-05-28 |
Halo region formation by epitaxial growth
Grant 9,034,741 - Adam , et al. May 19, 2 | 2015-05-19 |
Self aligned device with enhanced stress and methods of manufacture
Grant 9,006,052 - Holt , et al. April 14, 2 | 2015-04-14 |
Faceted Intrinsic Epitaxial Buffer Layer For Reducing Short Channel Effects While Maximizing Channel Stress Levels
App 20150084096 - Chandra; Bhupesh ; et al. | 2015-03-26 |
Transistor with buried silicon germanium for improved proximity control and optimized recess shape
Grant 8,946,064 - Adam , et al. February 3, 2 | 2015-02-03 |
Faceted intrinsic epitaxial buffer layer for reducing short channel effects while maximizing channel stress levels
Grant 8,940,595 - Chandra , et al. January 27, 2 | 2015-01-27 |
Method For Fabricating Semiconductor Device
App 20150011070 - Kim; Jin-Bum ; et al. | 2015-01-08 |
Halo Region Formation By Epitaxial Growth
App 20140353732 - Adam; Thomas N. ; et al. | 2014-12-04 |
Faceted Intrinsic Epitaxial Buffer Layer For Reducing Short Channel Effects While Maximizing Channel Stress Levels
App 20140264558 - Chandra; Bhupesh ; et al. | 2014-09-18 |
Semiconductor device and method with greater epitaxial growth on 110 crystal plane
Grant 8,815,656 - Adam , et al. August 26, 2 | 2014-08-26 |
Pre-gate, Source/drain Strain Layer Formation
App 20140213029 - Holt; Judson R. ; et al. | 2014-07-31 |
Method for growing strain-inducing materials in CMOS circuits in a gate first flow
Grant 8,779,525 - Bai , et al. July 15, 2 | 2014-07-15 |
Measurement Of Cmos Device Channel Strain By X-ray Diffraction
App 20140159161 - Adam; Thomas N. ; et al. | 2014-06-12 |
Measurement of CMOS device channel strain by X-ray diffraction
Grant 8,716,037 - Adam , et al. May 6, 2 | 2014-05-06 |
Semiconductor Device and Method With Greater Epitaxial Growth on 110 Crystal Plane
App 20140077275 - Adam; Thomas N. ; et al. | 2014-03-20 |
Structure and method for mobility enhanced MOSFETS with unalloyed silicide
Grant 8,642,434 - Liu , et al. February 4, 2 | 2014-02-04 |
Field effect transistor device
Grant 08618617 - | 2013-12-31 |
Field effect transistor device
Grant 8,618,617 - Chan , et al. December 31, 2 | 2013-12-31 |
Self-aligned embedded SiGe structure and method of manufacturing the same
Grant 8,598,009 - Greene , et al. December 3, 2 | 2013-12-03 |
Method and structure for PMOS devices with high K metal gate integration and SiGe channel engineering
Grant 8,575,655 - Bedell , et al. November 5, 2 | 2013-11-05 |
Stress enhanced transistor devices and methods of making
Grant 8,513,718 - Faltermeier , et al. August 20, 2 | 2013-08-20 |
Field effect transistor device
Grant 8,492,234 - Chan , et al. July 23, 2 | 2013-07-23 |
Field Effect Transistor Device
App 20130175547 - Chan; Kevin K. ; et al. | 2013-07-11 |
Method For Growing Strain-inducing Materials In Cmos Circuits In A Gate First Flow
App 20130161759 - Bai; Bo ; et al. | 2013-06-27 |
Stressed Transistor With Improved Metastability
App 20130134444 - Adam; Thomas N. ; et al. | 2013-05-30 |
Method and structure for PMOS devices with high K metal gate integration and SiGe channel engineering
Grant 8,440,547 - Bedell , et al. May 14, 2 | 2013-05-14 |
Method for growing strain-inducing materials in CMOS circuits in a gate first flow
Grant 8,426,265 - Bai , et al. April 23, 2 | 2013-04-23 |
Monolayer dopant embedded stressor for advanced CMOS
Grant 8,421,191 - Chan , et al. April 16, 2 | 2013-04-16 |
Stressed transistor with improved metastability
Grant 8,361,859 - Adam , et al. January 29, 2 | 2013-01-29 |
Transistor With Buried Silicon Germanium For Improved Proximity Control And Optimized Recess Shape
App 20120326168 - Adam; Thomas N. ; et al. | 2012-12-27 |
Transistor With Buried Silicon Germanium For Improved Proximity Control And Optimized Recess Shape
App 20120319166 - Adam; Thomas N. ; et al. | 2012-12-20 |
Delta monolayer dopants epitaxy for embedded source/drain silicide
Grant 8,299,535 - Chan , et al. October 30, 2 | 2012-10-30 |
Monolayer Dopant Embedded Stressor For Advanced Cmos
App 20120261717 - Chan; Kevin K. ; et al. | 2012-10-18 |
METHODS OF INTEGRATING REVERSE eSiGe ON NFET AND SiGe CHANNEL ON PFET, AND RELATED STRUCTURE
App 20120228716 - Harley; Eric C. T. ; et al. | 2012-09-13 |
Self Aligned Device With Enhanced Stress And Methods Of Manufacture
App 20120228639 - HOLT; Judson R. ; et al. | 2012-09-13 |
SELF-ALIGNED EMBEDDED SiGe STRUCTURE AND METHOD OF MANUFACTURING THE SAME
App 20120208337 - Greene; Brian J. ; et al. | 2012-08-16 |
Monolayer dopant embedded stressor for advanced CMOS
Grant 8,236,660 - Chan , et al. August 7, 2 | 2012-08-07 |
Methods of integrating reverse eSiGe on NFET and SiGe channel on PFET, and related structure
Grant 8,232,186 - Harley , et al. July 31, 2 | 2012-07-31 |
Stress enhanced transistor devices and methods of making
Grant 8,232,172 - Adam , et al. July 31, 2 | 2012-07-31 |
METHOD AND STRUCTURE FOR PMOS DEVICES WITH HIGH K METAL GATE INTEGRATION AND SiGe CHANNEL ENGINEERING
App 20120181631 - Bedell; Stephen W. ; et al. | 2012-07-19 |
Pre-gate, Source/drain Strain Layer Formation
App 20120181578 - Holt; Judson R. ; et al. | 2012-07-19 |
Self-aligned embedded SiGe structure and method of manufacturing the same
Grant 8,222,673 - Greene , et al. July 17, 2 | 2012-07-17 |
Stress enhanced transistor devices and methods of making
Grant 8,216,893 - Faltermeier , et al. July 10, 2 | 2012-07-10 |
Structure and method for mobility enhanced MOSFETs with unalloyed silicide
Grant 8,217,423 - Liu , et al. July 10, 2 | 2012-07-10 |
Stress Enhanced Transistor Devices And Methods Of Making
App 20120168775 - Faltermeier; Johnathan E. ; et al. | 2012-07-05 |
Structure And Method For Mobility Enhanced Mosfets With Unalloyed Silicide
App 20120146092 - Liu; Yaocheng ; et al. | 2012-06-14 |
Measurement Of Cmos Device Channel Strain By X-ray Diffraction
App 20120146050 - ADAM; THOMAS N. ; et al. | 2012-06-14 |
Structure And Method For Mobility Enhanced Mosfets With Unalloyed Silicide
App 20120149159 - Liu; Yaocheng ; et al. | 2012-06-14 |
Stressed Transistor With Improved Metastability
App 20120112208 - ADAM; THOMAS N. ; et al. | 2012-05-10 |
Method For Growing Strain-inducing Materials In Cmos Circuits In A Gate First Flow
App 20120104507 - Bai; Bo ; et al. | 2012-05-03 |
Self Aligned Device With Enhanced Stress And Methods Of Manufacture
App 20120086046 - Holt; Judson R. ; et al. | 2012-04-12 |
Delta Monolayer Dopants Epitaxy For Embedded Source/drain Silicide
App 20110316044 - Chan; Kevin K. ; et al. | 2011-12-29 |
Field Effect Transistor Device
App 20110316046 - Chan; Kevin K. ; et al. | 2011-12-29 |
Fabricating semiconductor structures
Grant 8,080,451 - Adam , et al. December 20, 2 | 2011-12-20 |
SELF-ALIGNED EMBEDDED SiGe STRUCTURE AND METHOD OF MANUFACTURING THE SAME
App 20110298008 - Greene; Brian J. ; et al. | 2011-12-08 |
Monolayer Dopant Embedded Stressor For Advanced Cmos
App 20110260213 - Chan; Kevin K. ; et al. | 2011-10-27 |
Pre-gate, Source/drain Strain Layer Formation
App 20110215376 - Holt; Judson R. ; et al. | 2011-09-08 |
Multiple crystallographic orientation semiconductor structures
Grant 7,993,990 - Narasimha , et al. August 9, 2 | 2011-08-09 |
Transistor having V-shaped embedded stressor
Grant 7,989,298 - Chan , et al. August 2, 2 | 2011-08-02 |
Transistor Having V-shaped Embedded Stressor
App 20110183486 - Chan; Kevin K. ; et al. | 2011-07-28 |
Stress Enhanced Transistor Devices And Methods Of Making
App 20110159655 - Adam; Thomas N. ; et al. | 2011-06-30 |
Method of reducing stacking faults through annealing
Grant 7,956,417 - Wang , et al. June 7, 2 | 2011-06-07 |
Semiconductor fabrication process including an SiGe rework method
Grant 7,955,936 - Tan , et al. June 7, 2 | 2011-06-07 |
Hybrid orientation substrate and method for fabrication thereof
Grant 7,892,899 - Yang , et al. February 22, 2 | 2011-02-22 |
Stacking fault reduction in epitaxially grown silicon
Grant 7,893,493 - Wang , et al. February 22, 2 | 2011-02-22 |
Method of enhancing hole mobility
Grant 7,863,653 - Utomo , et al. January 4, 2 | 2011-01-04 |
Method of forming a cross-section hourglass shaped channel region for charge carrier mobility modification
Grant 7,863,197 - Chen , et al. January 4, 2 | 2011-01-04 |
Metal oxide field effect transistor with a sharp halo
Grant 7,859,013 - Chen , et al. December 28, 2 | 2010-12-28 |
Raised STI structure and superdamascene technique for NMOSFET performance enhancement with embedded silicon carbon
Grant 7,838,932 - Chakravarti , et al. November 23, 2 | 2010-11-23 |
Method Of Reducing Stacking Faults Through Annealing
App 20100283089 - Wang; Yun-Yu ; et al. | 2010-11-11 |
Decoder for a stationary switch machine
Grant 7,820,501 - Wang , et al. October 26, 2 | 2010-10-26 |
METHOD AND STRUCTURE FOR PMOS DEVICES WITH HIGH K METAL GATE INTEGRATION AND SiGe CHANNEL ENGINEERING
App 20100200937 - Bedell; Stephen W. ; et al. | 2010-08-12 |
Strained semiconductor device and method of making same
Grant 7,772,676 - Han , et al. August 10, 2 | 2010-08-10 |
Multiple Crystallographic Orientation Semiconductor Structures
App 20100197118 - Narasimha; Shreesh ; et al. | 2010-08-05 |
Stress Enhanced Transistor Devices And Methods Of Making
App 20100187578 - Faltermeier; Johnathan E. ; et al. | 2010-07-29 |
Method For Fabricating Semiconductor Structures
App 20100112762 - Adam; Thomas N. ; et al. | 2010-05-06 |
Method Of Forming Source And Drain Of A Field-effect-transistor And Structure Thereof
App 20100090288 - Holt; Judson R. ; et al. | 2010-04-15 |
Multiple crystallographic orientation semiconductor structures
Grant 7,696,573 - Narasimha , et al. April 13, 2 | 2010-04-13 |
Method for fabricating a semiconductor structures and structures thereof
Grant 7,687,804 - Adam , et al. March 30, 2 | 2010-03-30 |
Stressed field effect transistors on hybrid orientation substrate
Grant 7,687,829 - Chidambarrao , et al. March 30, 2 | 2010-03-30 |
Pre-epitaxial disposable spacer integration scheme with very low temperature selective epitaxy for enhanced device performance
Grant 7,682,915 - Chen , et al. March 23, 2 | 2010-03-23 |
Stacking fault reduction in epitaxially grown silicon
Grant 7,674,720 - Wang , et al. March 9, 2 | 2010-03-09 |
Semiconductor Fabrication Process Including An SiGe Rework Method
App 20100009502 - Tan; Yong Siang ; et al. | 2010-01-14 |
Stress Enhanced Transistor Devices And Methods Of Making
App 20090302348 - Adam; Thomas N. ; et al. | 2009-12-10 |
METHODS OF INTEGRATING REVERSE eSiGe ON NFET AND SiGe CHANNEL ON PFET, AND RELATED STRUCTURE
App 20090294801 - Harley; Eric C. T. ; et al. | 2009-12-03 |
CMOS devices with hybrid channel orientations, and methods for fabricating the same using faceted epitaxy
Grant 7,582,516 - Dyer , et al. September 1, 2 | 2009-09-01 |
Method to form selective strained Si using lateral epitaxy
Grant 7,572,712 - Chong , et al. August 11, 2 | 2009-08-11 |
Method and Structure For NFET With Embedded Silicon Carbon
App 20090181508 - Holt; Judson R. ; et al. | 2009-07-16 |
Method For Fabricating A Semiconductor Structures And Structures Thereof
App 20090173941 - Adam; Thomas N. ; et al. | 2009-07-09 |
Method And Structure For Semiconductor Devices With Silicon-germanium Deposits
App 20090152590 - Adam; Thomas N. ; et al. | 2009-06-18 |
High performance field effect transistors on SOI substrate with stress-inducing material as buried insulator and methods
Grant 7,528,050 - Holt , et al. May 5, 2 | 2009-05-05 |
Multiple Crystallographic Orientation Semiconductor Structures
App 20090108302 - Narasimha; Shreesh ; et al. | 2009-04-30 |
Semiconductor structures including multiple crystallographic orientations and methods for fabrication thereof
Grant 7,494,918 - Kim , et al. February 24, 2 | 2009-02-24 |
MOSFETs comprising source/drain regions with slanted upper surfaces, and method for fabricating the same
Grant 7,485,524 - Luo , et al. February 3, 2 | 2009-02-03 |
Hybrid Orientation Substrate And Method For Fabrication Thereof
App 20090029531 - Yang; Haining S. ; et al. | 2009-01-29 |
Hybrid orientation substrate and method for fabrication of thereof
Grant 7,482,209 - Yang , et al. January 27, 2 | 2009-01-27 |
Method and structure to form self-aligned selective-SOI
Grant 7,482,656 - Luo , et al. January 27, 2 | 2009-01-27 |
Raised STI structure and superdamascene technique for NMOSFET performance enhancement with embedded silicon carbon
Grant 7,473,594 - Chakravarti , et al. January 6, 2 | 2009-01-06 |
Stacking Fault Reduction In Epitaxially Grown Silicon
App 20080268609 - Wang; Yun-Yu ; et al. | 2008-10-30 |
Cross-section Hourglass Shaped Channel Region For Charge Carrier Mobility Modification
App 20080258180 - Chen; Huajie ; et al. | 2008-10-23 |
Stressed Field Effect Transistors On Hybrid Orientation Substrate
App 20080251817 - Chidambarrao; Dureseti ; et al. | 2008-10-16 |
High Performance Field Effect Transistors On Soi Substrate With Stress-inducing Material As Buried Insulator And Methods
App 20080206951 - Holt; Judson R. ; et al. | 2008-08-28 |
Pre-epitaxial Disposable Spacer Integration Scheme With Very Low Temperature Selective Epitaxy For Enhanced Device Performance
App 20080199998 - Chen; Huajie ; et al. | 2008-08-21 |
Stressed field effect transistors on hybrid orientation substrate
Grant 7,405,436 - Chidambarrao , et al. July 29, 2 | 2008-07-29 |
Structure And Method For Mobility Enhanced Mosfets With Unalloyed Silicide
App 20080164491 - Liu; Yaocheng ; et al. | 2008-07-10 |
High performance field effect transistors on SOI substrate with stress-inducing material as buried insulator and methods
Grant 7,388,278 - Holt , et al. June 17, 2 | 2008-06-17 |
Metal oxide field effect transistor with a sharp halo and a method of forming the transistor
Grant 7,384,835 - Chen , et al. June 10, 2 | 2008-06-10 |
Raised Sti Structure And Superdamascene Technique For Nmosfet Performance Enhancement With Embedded Silicon Carbon
App 20080128712 - Chakravarti; Ashima B. ; et al. | 2008-06-05 |
Pre-epitaxial disposable spacer integration scheme with very low temperature selective epitaxy for enhanced device performance
Grant 7,381,623 - Chen , et al. June 3, 2 | 2008-06-03 |
Method To Form Selective Strained Si Using Lateral Epitaxy
App 20080116482 - Chong; Yung Fu ; et al. | 2008-05-22 |
Method Of Enhancing Hole Mobility
App 20080116484 - Utomo; Henry K. ; et al. | 2008-05-22 |
Hybrid Orientation Substrate And Method For Fabrication Thereof
App 20080111214 - Yang; Haining S. ; et al. | 2008-05-15 |
Metal Oxide Field Effect Transistor With A Sharp Halo
App 20080093629 - Chen; Huajie ; et al. | 2008-04-24 |
Method Of Reducing Stacking Faults Through Annealing
App 20080087961 - Wang; Yun-Yu ; et al. | 2008-04-17 |
Semiconductor Structures Including Multiple Crystallographic Orientations And Methods For Fabrication Thereof
App 20080083952 - Kim; Byeong Y. ; et al. | 2008-04-10 |
Raised Sti Structure And Superdamascene Technique For Nmosfet Performance Enhancement With Embedded Silicon Carbon
App 20080026516 - Chakravarti; Ashima B. ; et al. | 2008-01-31 |
Mosfets Comprising Source/drain Regions With Slanted Upper Surfaces, And Method For Fabricating The Same
App 20080006854 - Luo; Zhijiong ; et al. | 2008-01-10 |
Stacking Fault Reduction In Epitaxially Grown Silicon
App 20080006876 - Wang; Yun-Yu ; et al. | 2008-01-10 |
Strained semiconductor device and method of making same
App 20070295989 - Han; Jin-Ping ; et al. | 2007-12-27 |
Method And Structure To Form Self-aligned Selective-soi
App 20070278591 - Luo; Zhijiong ; et al. | 2007-12-06 |
Cmos Devices With Hybrid Channel Orientations, And Methods For Fabricating The Same Using Faceted Epitaxy
App 20070278585 - Dyer; Thomas W. ; et al. | 2007-12-06 |
Metal Oxide Field Effect Transistor With A Sharp Halo And A Method Of Forming The Transistor
App 20070275510 - Chen; Huajie ; et al. | 2007-11-29 |
Epitaxy of Silicon-Carbon Substitutional Solid Solutions by Ultra-Fast Annealing of Amorphous Material
App 20070238267 - Liu; Yaocheng ; et al. | 2007-10-11 |
Method For Post-rie Passivation Of Semiconductor Surfaces For Epitaxial Growth
App 20070048980 - Holt; Judson R. ; et al. | 2007-03-01 |
High performance field effect transistors on SOI substrate with stress-inducing material as buried insulator and methods
App 20060214225 - Holt; Judson R. ; et al. | 2006-09-28 |
Stressed field effect transistors on hybrid orientation substrate
App 20060145264 - Chidambarrao; Dureseti ; et al. | 2006-07-06 |
Chemical treatment to retard diffusion in a semiconductor overlayer
Grant 7,071,103 - Chan , et al. July 4, 2 | 2006-07-04 |
Ultra-thin body super-steep retrograde well (SSRW) FET devices
Grant 7,002,214 - Boyd , et al. February 21, 2 | 2006-02-21 |
Ultra-thin Body Super-steep Retrograde Well (ssrw) Fet Devices
App 20060022270 - Boyd; Diane C. ; et al. | 2006-02-02 |
Chemical Treatment To Retard Diffusion In A Semiconductor Overlayer
App 20060024934 - Chan; Kevin K. ; et al. | 2006-02-02 |
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