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name:-0.0033938884735107
name:-0.019830942153931
name:-0.00073385238647461
Holst; John C. Patent Filings

Holst; John C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Holst; John C..The latest application filed is for "soft error robust low power latch device layout techniques".

Company Profile
0.17.3
  • Holst; John C. - Saratoga CA US
  • Holst; John C. - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Soft error robust low power latch device layout techniques
Grant 8,547,155 - Holst , et al. October 1, 2
2013-10-01
Soft Error Robust Low Power Latch Device Layout Techniques
App 20130049835 - Holst; John C. ;   et al.
2013-02-28
Crossbar apparatus for a forwarding table memory in a router
Grant 8,270,399 - Holst , et al. September 18, 2
2012-09-18
Crossbar Apparatus For A Forwarding Table Memory In A Router
App 20090063702 - Holst; John C. ;   et al.
2009-03-05
Crossbar apparatus for a forwarding table memory in a router
Grant 7,450,438 - Holst , et al. November 11, 2
2008-11-11
Minimizing transistor size in integrated circuits
Grant 7,026,691 - Sander , et al. April 11, 2
2006-04-11
Capacitively coupled DTMOS on SOI
Grant 6,420,767 - Krishnan , et al. July 16, 2
2002-07-16
High-speed lateral bipolar device in SOI process
Grant 6,376,880 - Holst April 23, 2
2002-04-23
Minimizing transistor size in integrated circuits
Grant 6,287,953 - Sander , et al. September 11, 2
2001-09-11
Minimizing transistor size in integrated circuits
Grant 6,146,954 - Klein , et al. November 14, 2
2000-11-14
Start-up circuit for write selects and equilibrates
Grant 6,084,454 - Holst July 4, 2
2000-07-04
Forming local interconnects in integrated circuits
Grant 6,051,881 - Klein , et al. April 18, 2
2000-04-18
Method for self-aligning polysilicon gates with field isolation and the resultant structure
Grant 6,046,088 - Klein , et al. April 4, 2
2000-04-04
Register-based redundancy circuit and method for built-in self-repair in a semiconductor memory device
Grant 5,920,515 - Shaik , et al. July 6, 1
1999-07-06
Register file with bypass capability
Grant 5,790,461 - Holst August 4, 1
1998-08-04
Comparator cell for use in a content addressable memory
Grant 5,598,115 - Holst January 28, 1
1997-01-28
Pulsed ground circuit for CAM and PAL memories
Grant 5,446,685 - Holst August 29, 1
1995-08-29
Decoder scheme for fully associative translation-lookaside buffer
Grant 5,299,147 - Holst March 29, 1
1994-03-29

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