HOLLOWAY, THOMAS C.
Patent Applications and Registrations
Patent applications and USPTO patent grants for HOLLOWAY, THOMAS C..The latest application filed is for "lightly doped drain extension process to minimize source/drain resistance while maintaining hot carrier lifetime".
- HOLLOWAY, THOMAS C. - MURPHY TX
- Holloway; Thomas C. - Dallas TX
- Holloway; Thomas C. - Garland TX
| Patent | Date |
|---|---|
| Lightly Doped Drain Extension Process To Minimize Source/drain Resistance While Maintaining Hot Carrier Lifetime App 20010003666 - HOLLOWAY, THOMAS C. | 2001-06-14 |
| Variable threshold voltage gate electrode for higher performance mosfets Grant 6,222,251 - Holloway April 24, 2 | 2001-04-24 |
| Memory circuit and method of construction Grant 6,072,715 - Holloway June 6, 2 | 2000-06-06 |
| Method of improving diffusion barrier properties of gate oxides by applying ions or free radicals of nitrogen in low energy Grant 6,040,249 - Holloway March 21, 2 | 2000-03-21 |
| Semiconductor device having dual gate and method of formation Grant 5,989,962 - Holloway , et al. November 23, 1 | 1999-11-23 |
| VLSI interconnect method and structure Grant 5,302,539 - Haken , et al. * April 12, 1 | 1994-04-12 |
| Integrated circuit process with TiN-gate transistor Grant 4,931,411 - Tigelaar , et al. June 5, 1 | 1990-06-05 |
| Single-polysilicon dram device and process Grant 4,894,693 - Tigelaar , et al. January 16, 1 | 1990-01-16 |
| Threshold adjustment method for an IGFET Grant 4,845,047 - Holloway , et al. July 4, 1 | 1989-07-04 |
| VLSI local interconnect structure Grant 4,821,085 - Haken , et al. April 11, 1 | 1989-04-11 |
| Integrated circuit device and process with tin-gate transistor Grant 4,814,854 - Tigelaar , et al. March 21, 1 | 1989-03-21 |
| Device and process with doubled capacitors Grant 4,811,076 - Tigelaar , et al. March 7, 1 | 1989-03-07 |
| Integrated circuit device and process with tin capacitors Grant 4,811,078 - Tigelaar , et al. March 7, 1 | 1989-03-07 |
| Process for making integrated circuits having titanium nitride triple interconnect Grant 4,804,636 - Groover, III , et al. February 14, 1 | 1989-02-14 |
| Local interconnect Grant 4,746,219 - Holloway , et al. May 24, 1 | 1988-05-24 |
| Oxide-capped titanium silicide formation Grant 4,690,730 - Tang , et al. September 1, 1 | 1987-09-01 |
| Process to increase tin thickness Grant 4,676,866 - Tang , et al. June 30, 1 | 1987-06-30 |
| Process for patterning local interconnects Grant 4,657,628 - Holloway , et al. April 14, 1 | 1987-04-14 |
| Formation of submicron substrate element Grant 4,354,896 - Hunter , et al. October 19, 1 | 1982-10-19 |
| Fabrication methods for the high capacity ram cell Grant 4,112,575 - Fu , et al. September 12, 1 | 1978-09-12 |
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