loadpatents
name:-0.009835958480835
name:-0.02515697479248
name:-0.00044822692871094
Hollmer; Shane C. Patent Filings

Hollmer; Shane C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hollmer; Shane C..The latest application filed is for "resistive devices and methods of operation thereof".

Company Profile
0.24.7
  • Hollmer; Shane C. - Grass Valley CA
  • Hollmer; Shane C. - San Jose CA
  • Hollmer; Shane C. - Santa Clara CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Resistive memory device with ramp-up/ramp-down program/erase pulse
Grant 9,734,902 - Kamalanathan , et al. August 15, 2
2017-08-15
Resistive Devices and Methods of Operation Thereof
App 20160012885 - Kamalanathan; Deepak ;   et al.
2016-01-14
Method of operating a resistive memory device with a ramp-up/ramp-down program/erase pulse
Grant 9,165,644 - Kamalanathan , et al. October 20, 2
2015-10-20
Safeguarding data through an SMT process
Grant 9,007,808 - Dinh , et al. April 14, 2
2015-04-14
Resistive Devices and Methods of Operation Thereof
App 20130301337 - Kamalanathan; Deepak ;   et al.
2013-11-14
Method and apparatus for avoiding gated diode breakdown in transistor circuits
Grant 7,132,873 - Hollmer November 7, 2
2006-11-07
Method and apparatus for detecting exposure of a semiconductor circuit to ultra-violet light
Grant 6,970,386 - Hollmer November 29, 2
2005-11-29
Method and apparatus for emulating an electrically erasable programmable read only memory (EEPROM) using non-volatile floating gate memory cells
Grant 6,950,336 - Sowards , et al. September 27, 2
2005-09-27
Method and apparatus for multi-mode operation in a semiconductor circuit
App 20040243783 - Ding, Zhimin ;   et al.
2004-12-02
Method and apparatus for detecting exposure of a semiconductor circuit to ultra-violet light
App 20040174749 - Hollmer, Shane C.
2004-09-09
Method and apparatus for avoiding gated diode breakdown in transistor circuits
App 20040130376 - Hollmer, Shane C.
2004-07-08
Method and apparatus for emulating an electrically erasable programmable read only memory (EEPROM) using non-volatile floating gate memory cells
App 20030189858 - Sowards, David ;   et al.
2003-10-09
Sidewall NROM and method of manufacture thereof for non-volatile memory cells
Grant 6,583,479 - Fastow , et al. June 24, 2
2003-06-24
Method and apparatus for adjusting on-chip current reference for EEPROM sensing
Grant 6,525,966 - Hollmer , et al. February 25, 2
2003-02-25
Double boosting scheme for NAND to improve program inhibit characteristics
Grant 6,504,757 - Hollmer , et al. January 7, 2
2003-01-07
Select transistor architecture for a virtual ground non-volatile memory cell array
Grant 6,477,083 - Fastow , et al. November 5, 2
2002-11-05
Continuous capacitor divider sampled regulation scheme
Grant 6,411,069 - Hollmer June 25, 2
2002-06-25
Method of maintaining constant erasing speeds for non-volatile memory cells
Grant 6,215,702 - Derhacobian , et al. April 10, 2
2001-04-10
Global erase/program verification apparatus and method
Grant 6,181,605 - Hollmer , et al. January 30, 2
2001-01-30
Floating gate capacitor for use in voltage regulators
Grant 6,137,153 - Le , et al. October 24, 2
2000-10-24
EEPROM decoder block having a p-well coupled to a charge pump for charging the p-well and method of programming with the EEPROM decoder block
Grant 6,081,455 - Le , et al. June 27, 2
2000-06-27
Erase verify scheme for NAND flash
Grant 6,009,014 - Hollmer , et al. December 28, 1
1999-12-28
Scheme for page erase and erase verify in a non-volatile memory array
Grant 5,995,417 - Chen , et al. November 30, 1
1999-11-30
Array VSS biasing for NAND array programming reliability
Grant 5,978,266 - Chen , et al. November 2, 1
1999-11-02
Programmed reference
Grant 5,828,601 - Hollmer , et al. October 27, 1
1998-10-27
Parallel page buffer verify or read of cells on a word line using a signal from a reference cell in a flash memory device
Grant 5,638,326 - Hollmer , et al. June 10, 1
1997-06-10
Reduced column leakage during programming for a flash memory array
Grant 5,579,261 - Radjy , et al. November 26, 1
1996-11-26
Multistepped threshold convergence for a flash memory array
Grant 5,576,991 - Radjy , et al. November 19, 1
1996-11-19
Boosted and regulated gate power supply with reference tracking for multi-density and low voltage supply memories
Grant 5,511,026 - Cleveland , et al. April 23, 1
1996-04-23

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