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Patent applications and USPTO patent grants for Hollenbeck; David B..The latest application filed is for "defect mapping for a digital display".
Patent | Date |
---|---|
Adjustment of liquid crystal display voltage Grant 8,816,999 - Dallas , et al. August 26, 2 | 2014-08-26 |
Digital gray scale methods and devices Grant 8,487,853 - Dallas , et al. July 16, 2 | 2013-07-16 |
Defect Mapping For A Digital Display App 20120075320 - Handschy; Mark A. ;   et al. | 2012-03-29 |
Nor-based Grayscale For A Digital Display App 20120069060 - Handschy; Mark A. ;   et al. | 2012-03-22 |
Digital display Grant 8,059,142 - Handschy , et al. November 15, 2 | 2011-11-15 |
Adjustment Of Liquid Crystal Display Voltage App 20110227887 - DALLAS; JAMES M. ;   et al. | 2011-09-22 |
Digital Gray Scale Methods And Devices App 20110199405 - DALLAS; JAMES M. ;   et al. | 2011-08-18 |
Adjustment Of Display Illumination Timing App 20110169882 - DALLAS; JAMES M. ;   et al. | 2011-07-14 |
Microdisplay and interface on a single chip Grant 7,932,875 - Dallas , et al. April 26, 2 | 2011-04-26 |
Microdisplay And Interface On A Single Chip App 20100245212 - DALLAS; JAMES M. ;   et al. | 2010-09-30 |
Microdisplay and interface on a single chip Grant 7,755,570 - Dallas , et al. July 13, 2 | 2010-07-13 |
Digital Display App 20100045690 - Handschy; Mark A. ;   et al. | 2010-02-25 |
Microdisplay And Interface On A Single Chip App 20080100633 - Dallas; James M. ;   et al. | 2008-05-01 |
Microdisplay and interface on single chip Grant 7,283,105 - Dallas , et al. October 16, 2 | 2007-10-16 |
Microdisplay and interface on single chip App 20040263502 - Dallas, James M. ;   et al. | 2004-12-30 |
Input clock delayed by a plurality of elements that are connected to logic circuitry to produce a clock frequency having a rational multiple less than one Grant 6,535,989 - Dvorak , et al. March 18, 2 | 2003-03-18 |
System for presenting consumer data App 20020059240 - Hollenbeck, David B. ;   et al. | 2002-05-16 |
Clock Buffer Circuit Having Short Propagation Delay App 20010043105 - ZHANG, JOHNNY Q. ;   et al. | 2001-11-22 |
Package routing of integrated circuit signals Grant 6,161,215 - Hollenbeck , et al. December 12, 2 | 2000-12-12 |
Delay elements arranged for a signal controlled oscillator Grant 6,157,266 - Tsai , et al. December 5, 2 | 2000-12-05 |
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