loadpatents
name:-0.03010892868042
name:-0.024467945098877
name:-0.0018007755279541
Hokenek; Erdem Patent Filings

Hokenek; Erdem

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hokenek; Erdem.The latest application filed is for "multithreaded processor with multiple concurrent pipelines per thread".

Company Profile
0.27.23
  • Hokenek; Erdem - Yorktown Heights NY US
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Multithreaded processor with multiple concurrent pipelines per thread
Grant 8,959,315 - Hokenek , et al. February 17, 2
2015-02-17
Multithreaded processor with multiple concurrent pipelines per thread
Grant 8,918,627 - Hokenek , et al. December 23, 2
2014-12-23
Multithreaded processor with multiple concurrent pipelines per thread
Grant 8,892,849 - Hokenek , et al. November 18, 2
2014-11-18
Multithreaded processor with multiple concurrent pipelines per thread
Grant 8,762,688 - Hokenek , et al. June 24, 2
2014-06-24
Multithreaded Processor With Multiple Concurrent Pipelines Per Thread
App 20120096243 - Hokenek; Erdem ;   et al.
2012-04-19
Multithreaded processor with multiple concurrent pipelines per thread
Grant 8,074,051 - Hokenek , et al. December 6, 2
2011-12-06
Processor having parallel vector multiply and reduce operations with sequential semantics
Grant 7,797,363 - Hokenek , et al. September 14, 2
2010-09-14
Multithreaded Processor With Multiple Concurrent Pipelines Per Thread
App 20100199073 - Hokenek; Erdem ;   et al.
2010-08-05
Multithreaded Processor With Multiple Concurrent Pipelines Per Thread
App 20100199075 - Hokenek; Erdem ;   et al.
2010-08-05
Multithreaded Processor With Multiple Concurrent Pipelines Per Thread
App 20100122068 - Hokenek; Erdem ;   et al.
2010-05-13
Data File Storing Multiple Data Types With Controlled Data Access
App 20090276432 - Hokenek; Erdem ;   et al.
2009-11-05
Multi-threaded processor having compound instruction and operation formats
Grant 7,475,222 - Glossner , et al. January 6, 2
2009-01-06
Vector register file with arbitrary vector addressing
Grant 7,467,288 - Glossner, III , et al. December 16, 2
2008-12-16
Arithmetic unit for addition or subtraction with preliminary saturation detection
Grant 7,428,567 - Schulte , et al. September 23, 2
2008-09-23
System and method including distributed instruction buffers for storing frequently executed instructions in predecoded form
Grant 7,356,673 - Altman , et al. April 8, 2
2008-04-08
Digital signal processor with cascaded SIMD organization
Grant 7,308,559 - Glossner, III , et al. December 11, 2
2007-12-11
Doppler compensated receiver
Grant 7,209,529 - Iancu , et al. April 24, 2
2007-04-24
Turbo decoder using parallel processing
Grant 7,055,102 - Lu , et al. May 30, 2
2006-05-30
Processor having compound instruction and operation formats
App 20060095717 - Glossner; C. John ;   et al.
2006-05-04
Multithreaded processor with multiple concurrent pipelines per thread
App 20060095729 - Hokenek; Erdem ;   et al.
2006-05-04
Processor having parallel vector multiply and reduce operations with sequential semantics
App 20060041610 - Hokenek; Erdem ;   et al.
2006-02-23
Ultra low power adder with sum synchronization
Grant 6,990,509 - Hokenek , et al. January 24, 2
2006-01-24
Method and apparatus for multithreaded cache with cache eviction based on thread identifier
Grant 6,990,557 - Hokenek , et al. January 24, 2
2006-01-24
Inter-thread communications using shared interrupt register
Grant 6,971,103 - Hokenek , et al. November 29, 2
2005-11-29
Multithreaded processor with efficient processing for convergence device applications
Grant 6,968,445 - Hokenek , et al. November 22, 2
2005-11-22
Method and apparatus for thread-based memory access in a multithreaded processor
Grant 6,925,643 - Hokenek , et al. August 2, 2
2005-08-02
Method and apparatus for multithreaded cache with simplified implementation of cache replacement policy
Grant 6,912,623 - Hokenek , et al. June 28, 2
2005-06-28
Method and apparatus for register file port reduction in a multithreaded processor
Grant 6,904,511 - Hokenek , et al. June 7, 2
2005-06-07
Arithmetic unit for addition or subtraction with preliminary saturation detection
App 20050060359 - Schulte, Michael J. ;   et al.
2005-03-17
Doppler compensated receiver
App 20050007277 - Iancu, Daniel ;   et al.
2005-01-13
Method and apparatus for token triggered multithreading
Grant 6,842,848 - Hokenek , et al. January 11, 2
2005-01-11
Turbo decoder using parallel processing
App 20040111659 - Lu, Jin ;   et al.
2004-06-10
Vector register file with arbitrary vector addressing
App 20040103262 - Glossner, Clair John III ;   et al.
2004-05-27
Digital signal processor with cascaded SIMD organization
App 20040078554 - Glossner, Clair John III ;   et al.
2004-04-22
Method and apparatus for token triggered multithreading
App 20040073781 - Hokenek, Erdem ;   et al.
2004-04-15
Method and apparatus for register file port reduction in a multithreaded processor
App 20040073779 - Hokenek, Erdem ;   et al.
2004-04-15
Method and apparatus for thread-based memory access in a multithreaded processor
App 20040073772 - Hokenek, Erdem ;   et al.
2004-04-15
Method and apparatus for high speed cross-thread interrupts in a multithreaded processor
App 20040073910 - Hokenek, Erdem ;   et al.
2004-04-15
Vector register file with arbitrary vector addressing
Grant 6,665,790 - Glossner, III , et al. December 16, 2
2003-12-16
Method and apparatus for multithreaded cache with cache eviction based on thread identifier
App 20030225975 - Hokenek, Erdem ;   et al.
2003-12-04
Method and apparatus for multithreaded cache with simplified implementation of cache replacement policy
App 20030225976 - Hokenek, Erdem ;   et al.
2003-12-04
Ultra low power adder with sum synchronization
App 20030172102 - Hokenek, Erdem ;   et al.
2003-09-11
Multithreaded processor with efficient processing for convergence device applications
App 20030120901 - Hokenek, Erdem ;   et al.
2003-06-26
System and method including distributed instruction buffers holding a second instruction form
App 20020161987 - Altman, Erik R. ;   et al.
2002-10-31
Power control of a processor using hardware structures controlled by a compiler with an accumulated instruction profile
App 20020112193 - Altman, Erik R. ;   et al.
2002-08-15
Leading 0/1 anticipator (LZA)
Grant 4,926,369 - Hokenek , et al. May 15, 1
1990-05-15

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed