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name:-0.019344091415405
name:-0.037822961807251
name:-0.0084338188171387
Hohensee; Paul H Patent Filings

Hohensee; Paul H

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hohensee; Paul H.The latest application filed is for "technologies for native code invocation using binary analysis".

Company Profile
0.26.9
  • Hohensee; Paul H - Nashua NH
  • Hohensee; Paul H. - Nashua NH
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Technologies for native code invocation using binary analysis
Grant 9,910,646 - Kanhere , et al. March 6, 2
2018-03-06
Technologies for native code invocation using binary analysis
App 20170185386 - Kanhere; Abhay S. ;   et al.
2017-06-29
Low-contention update buffer queuing for large systems
Grant 8,972,629 - Printezis , et al. March 3, 2
2015-03-03
Low-contention Update Buffer Queuing For Large Systems
App 20140281060 - PRINTEZIS; ANTONIOS ;   et al.
2014-09-18
Low-contention update buffer queuing for large systems
Grant 8,782,306 - Printezis , et al. July 15, 2
2014-07-15
Resource utilization monitor
Grant 8,683,483 - Hohensee March 25, 2
2014-03-25
Low-contention update buffer queuing for small systems
Grant 8,645,651 - Printezis , et al. February 4, 2
2014-02-04
Detecting conditions for transfer of execution from one computer instruction stream to another and executing transfer on satisfaction of the conditions
Grant 8,121,828 - Yates, Jr. , et al. February 21, 2
2012-02-21
Altering data storage conventions of a processor when execution flows from first architecture code to second architecture code
Grant 8,074,055 - Yates, Jr. , et al. December 6, 2
2011-12-06
Using on-chip and off-chip look-up tables indexed by instruction address to control instruction execution in a processor
Grant 8,065,504 - Yates, Jr. , et al. November 22, 2
2011-11-22
Low-Contention Update Buffer Queuing For Large Systems
App 20110191508 - Printezis; Antonios ;   et al.
2011-08-04
Low-Contention Update Buffer Queuing for Small Systems
App 20110185144 - Printezis; Antonios ;   et al.
2011-07-28
Computer for executing two instruction sets and adds a macroinstruction end marker for performing iterations after loop termination
Grant 7,941,647 - Yates, Jr. , et al. May 10, 2
2011-05-10
Resource Utilization Monitor
App 20090249352 - Hohensee; Paul H.
2009-10-01
Computer with two execution modes
App 20090204785 - Yates, JR.; John S. ;   et al.
2009-08-13
Detecting reordered side-effects
Grant 7,254,806 - Yates, Jr. , et al. August 7, 2
2007-08-07
Profiling ranges of execution of a computer program
Grant 7,137,110 - Reese , et al. November 14, 2
2006-11-14
Profiling program execution to identify frequently-executed portions and to assist binary translation
Grant 7,111,290 - Yates, Jr. , et al. September 19, 2
2006-09-19
Side tables annotating an instruction stream
Grant 7,069,421 - Yates, Jr. , et al. June 27, 2
2006-06-27
Profiling execution of computer programs
Grant 7,013,456 - Van Dyke , et al. March 14, 2
2006-03-14
Profiling execution of a sequence of events occuring during a profiled execution interval that matches time-independent selection criteria of events to be profiled
Grant 6,978,462 - Adler , et al. December 20, 2
2005-12-20
Profiling of computer programs executing in virtual memory systems
Grant 6,941,545 - Reese , et al. September 6, 2
2005-09-06
Transferring execution from one instruction stream to another
App 20050086650 - Yates, John S. JR. ;   et al.
2005-04-21
Table look-up for control of instruction execution
App 20050086451 - Yates, John S. JR. ;   et al.
2005-04-21
Profiling program execution into registers of a computer
Grant 6,826,748 - Hohensee , et al. November 30, 2
2004-11-30
Safety net paradigm for managing two computer execution modes
Grant 6,789,181 - Yates , et al. September 7, 2
2004-09-07
Modifying program execution based on profiling
Grant 6,763,452 - Hohensee , et al. July 13, 2
2004-07-13
System and method for generating fix-up code facilitating avoidance of an exception of a predetermined type in a digital computer system
Grant 6,064,815 - Hohensee , et al. May 16, 2
2000-05-16
System and method for facilitating avoidance of an exception of a predetermined type in a digital computer system by providing fix-up code for an instruction in response to detection of an exception condition resulting from execution thereof
Grant 5,907,708 - Hohensee , et al. May 25, 1
1999-05-25
Emulating a delayed exception on a digital computer having a corresponding precise exception mechanism
Grant 5,778,211 - Hohensee , et al. July 7, 1
1998-07-07
System and method for emulating a segmented virtual address space by a microprocessor that provides a non-segmented virtual address space
Grant 5,765,206 - Hohensee , et al. June 9, 1
1998-06-09

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