Hofmann; Richard Gerard

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hofmann; Richard Gerard.The latest application filed is for "processing data stream modification to reduce power effects during parallel processing".

Company Profile

2.63.58

Hofmann; Richard Gerard - Cary NC
Hofmann; Richard Gerard - Raleigh NC
Hofmann; Richard Gerard - Apex NC
Hofmann; Richard Gerard - Wake NC

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Ticket based request flow control Grant 11,226,910 - McDonald , et al. January 18, 2	2022-01-18
Bit inversion for data transmission Grant 11,139,830 - Da Fonseca , et al. October 5, 2	2021-10-05
Processing Data Stream Modification To Reduce Power Effects During Parallel Processing App 20210303359 - PARK; Hee Jun ; et al.	2021-09-30
Bit Inversion For Data Transmission App 20210234554 - DA FONSECA; Fernand ; et al.	2021-07-29
Power Management Circuit Including On-board Current-sense Resistor And On-die Current Sensor App 20210173419 - SEVERSON; Matthew ; et al.	2021-06-10
Ticket Based Request Flow Control App 20200285597 - MCDONALD; Joseph Gerald ; et al.	2020-09-10
Enhanced dynamic memory management with intelligent current/power consumption minimization Grant 10,429,915 - Park , et al. O	2019-10-01
Enhanced Dynamic Memory Management With Intelligent Current/power Consumption Minimization App 20170329385 - Park; Hee Jun ; et al.	2017-11-16
Enhanced dynamic memory management with intelligent current/power consumption minimization Grant 9,760,149 - Park , et al. September 12, 2	2017-09-12
Monitoring And Controlling Bus Ring Performance App 20160164698 - HOFMANN; Richard Gerard ; et al.	2016-06-09
Apparatus and methods employing variable clock gating hysteresis for a communications port Grant 9,285,860 - Hofmann March 15, 2	2016-03-15
Bus clock frequency scaling for a bus interconnect and related devices, systems, and methods Grant 9,286,257 - Hofmann , et al. March 15, 2	2016-03-15
Enforcing strongly-ordered requests in a weakly-ordered processing Grant 9,026,744 - Hofmann , et al. May 5, 2	2015-05-05
Flexible hardware module assignment for enhanced performance Grant 9,026,681 - Park , et al. May 5, 2	2015-05-05
Flexible Hardware Module Assignment For Enhanced Performance App 20150046604 - Park; Hee-Jun ; et al.	2015-02-12
Method and apparatus for detecting unauthorized access to a computing device and securely communicating information about such unauthorized access Grant 8,850,568 - Shirlen , et al. September 30, 2	2014-09-30
Method for securely communicating information about the location of a compromised computing device Grant 8,839,460 - Shirlen , et al. September 16, 2	2014-09-16
Enhanced Dynamic Memory Management With Intelligent Current/power Consumption Minimization App 20140195837 - Park; Hee Jun ; et al.	2014-07-10
Method and apparatus for adaptive voltage scaling based on instruction usage Grant 8,725,488 - Hofmann , et al. May 13, 2	2014-05-13
Cooperative writes over the address channel of a bus Grant 8,675,679 - Hofmann , et al. March 18, 2	2014-03-18
Temperature compensating adaptive voltage scalers (AVSs), systems, and methods Grant 8,661,274 - Hansquine , et al. February 25, 2	2014-02-25
Memory controllers, systems and methods for applying page management policies based on stream transaction information Grant 8,615,638 - Shirlen , et al. December 24, 2	2013-12-24
Auxiliary writes over address channel Grant 8,521,914 - Hofmann , et al. August 27, 2	2013-08-27
Low Latency Clock Gating Scheme for Power Reduction in Bus Interconnects App 20130117593 - Nooney; Prudhvi N. ; et al.	2013-05-09
Method and Apparatus for Adaptive Hysteresis Timer Adjustments for Clock Gating App 20130064337 - Hofmann; Richard Gerard ; et al.	2013-03-14
Methods and apparatus for resource sharing in a programmable interrupt controller Grant 8,244,947 - Shirlen , et al. August 14, 2	2012-08-14
Bus Clock Frequency Scaling for a Bus Interconnect and Related Devices, Systems, and Methods App 20120198266 - Hofmann; Richard Gerard ; et al.	2012-08-02
Auxiliary Writes Over Address Channel App 20120096202 - Hofmann; Richard Gerard ; et al.	2012-04-19
Cooperative Writes over the Address Channel of a Bus App 20120096201 - Hofmann; Richard Gerard ; et al.	2012-04-19
Arbitrating Stream Transactions Based on Information Related to the Stream Transaction(s) App 20120089759 - Shirlen; Martyn Ryan ; et al.	2012-04-12
Memory Controllers, Systems and Methods for Applying Page Management Policies Based on Stream Transaction Information App 20120089789 - Shirlen; Martyn Ryan ; et al.	2012-04-12
Cooperative writes over the address channel of a bus Grant 8,107,492 - Hofmann , et al. January 31, 2	2012-01-31
Auxiliary writes over address channel Grant 8,108,563 - Hofmann , et al. January 31, 2	2012-01-31
System and method for adaptive run-time reconfiguration for a reconfigurable instruction set co-processor architecture Grant 8,108,838 - Asaad , et al. January 31, 2	2012-01-31
Method of associating groups of classified source addresses with vibration patterns Grant 8,077,019 - Hofmann , et al. December 13, 2	2011-12-13
Apparatus and Methods Employing Variable Clock Gating Hysteresis for a Communications Port App 20110271134 - Hofmann; Richard Gerard	2011-11-03
Method and apparatus for transmitting memory pre-fetch commands on a bus Grant 8,028,143 - Hofmann , et al. September 27, 2	2011-09-27
Device directed memory barriers Grant 7,984,202 - Hofmann , et al. July 19, 2	2011-07-19
Weakly ordered processing systems and methods Grant 7,921,249 - Sullivan, Jr. , et al. April 5, 2	2011-04-05
Efficient execution of memory barrier bus commands with order constrained memory accesses Grant 7,917,676 - Sullivan, Jr. , et al. March 29, 2	2011-03-29
Scalable bus structure Grant 7,913,021 - Hofmann , et al. March 22, 2	2011-03-22
Temperature Compensating Adaptive Voltage Scalers (AVSs), Systems, and Methods App 20110004774 - Hansquine; David W. ; et al.	2011-01-06
Single bus command having transfer information for transferring data in a processing system Grant 7,822,903 - Hofmann , et al. October 26, 2	2010-10-26
Methods And Aparatus For Resource Sharing In A Programmable Interrupt Controller App 20100217906 - Shirlen; Martyn Ryan ; et al.	2010-08-26
Efficient Execution of Memory Barrier Bus Commands App 20100005208 - Sullivan, JR.; James Edward ; et al.	2010-01-07
Scalable Bus Structure App 20090327548 - Hofmann; Richard Gerard ; et al.	2009-12-31
Scalable bus structure Grant 7,617,343 - Hofmann , et al. November 10, 2	2009-11-10
Method and apparatus for performing an atomic semaphore operation Grant 7,610,463 - Speier , et al. October 27, 2	2009-10-27
Method For Securely Communicating Information About The Location Of A Compromised Computing Device App 20090228981 - Shirlen; Martyn Ryan ; et al.	2009-09-10
Method and Apparatus for Detecting Unauthorized Access to a Computing Device and Securely Communicating Information about such Unauthorized Access App 20090228698 - Shirlen; Martyn Ryan ; et al.	2009-09-10
System and method for adaptive run-time reconfiguration for a reconfigurable instruction set co-processor architecture Grant 7,523,449 - Asaad , et al. April 21, 2	2009-04-21
Memory Controller for Performing Memory Block Initialization and Copy App 20090089515 - Michalak; Gerald Paul ; et al.	2009-04-02
Minimizing memory barriers when enforcing strongly-ordered requests in a weakly-ordered processing system Grant 7,500,045 - Hofmann , et al. March 3, 2	2009-03-03
Method and Apparatus for Adaptive Voltage Scaling Based on Instruction Usage App 20090031155 - Hofmann; Richard Gerard ; et al.	2009-01-29
Device Directed Memory Barriers App 20080301342 - Hofmann; Richard Gerard ; et al.	2008-12-04
System and Method for Adaptive Run-Time Reconfiguration for a Reconfigurable Instruction Set Co-Processor Architecture App 20080215854 - Asaad; Sameh W. ; et al.	2008-09-04
Apparatus and methods for weighted bus arbitration among a plurality of master devices based on transfer direction and/or consumed bandwidth Grant 7,395,361 - Schaffer , et al. July 1, 2	2008-07-01
System on a chip bus with automatic pipeline stage insertion for timing closure Grant 7,296,175 - Augsburg , et al. November 13, 2	2007-11-13
Auxiliary Writes Over Address Channel App 20070233904 - Hofmann; Richard Gerard ; et al.	2007-10-04
Efficient execution of memory barrier bus commands App 20070214298 - Sullivan; James Edward JR. ; et al.	2007-09-13
Single Bus Command for Transferring Data in a Processing System App 20070204091 - Hofmann; Richard Gerard ; et al.	2007-08-30
Cooperative Writes Over the Address Channel of a Bus App 20070201506 - Hofmann; Richard Gerard ; et al.	2007-08-30
Method of Associating Groups of Classified Source Addresses with Vibration Patterns App 20070176742 - Hofmann; Richard Gerard ; et al.	2007-08-02
Bus access arbitration scheme Grant 7,249,210 - Ganasan , et al. July 24, 2	2007-07-24
Scalable bus structure Grant 7,209,998 - Hofmann , et al. April 24, 2	2007-04-24
Scalable Bus Structure App 20070088894 - Hofmann; Richard Gerard ; et al.	2007-04-19
Weighted bus arbitration based on transfer direction and consumed bandwidth App 20070067528 - Schaffer; Mark Michael ; et al.	2007-03-22
Method and apparatus for allocating bandwidth on a transmit channel of a bus Grant 7,185,123 - Hofmann , et al. February 27, 2	2007-02-27
System and method for adaptive run-time reconfiguration for a reconfigurable instruction set co-processor architecture Grant 7,167,971 - Asaad , et al. January 23, 2	2007-01-23
System and method for adaptive run-time reconfiguration for a reconfigurable instruction set co-processor architecture App 20060288191 - Asaad; Sameh W. ; et al.	2006-12-21
Ensuring orderly forward progress in granting snoop castout requests Grant 7,127,562 - Dieffenderfer , et al. October 24, 2	2006-10-24
Minimizing memory barriers when enforcing strongly-ordered requests in a weakly-ordered processing system App 20060218335 - Hofmann; Richard Gerard ; et al.	2006-09-28
Enforcing strongly-ordered requests in a weakly-ordered processing system App 20060218358 - Hofmann; Richard Gerard ; et al.	2006-09-28
Bus access arbitration scheme App 20060200607 - Subramaniam Ganasan; Jaya Prakash ; et al.	2006-09-07
Scalable bus structure App 20060198388 - Hofmann; Richard Gerard ; et al.	2006-09-07
System and method for delaying an interrupt request until corresponding data is provided to a destination device Grant 7,096,297 - Hofmann , et al. August 22, 2	2006-08-22
Method and apparatus for allocating bandwidth on a transmit channel of a bus App 20060136615 - Hofmann; Richard Gerard ; et al.	2006-06-22
Method and apparatus for performing an atomic semaphore operation App 20060090051 - Speier; Thomas Philip ; et al.	2006-04-27
Re-ordering a first request within a FIFO request queue to a different queue position when the first request receives a retry response from the target Grant 7,035,958 - Augsburg , et al. April 25, 2	2006-04-25
Method and apparatus for transmitting memory pre-fetch commands on a bus App 20060047914 - Hofmann; Richard Gerard ; et al.	2006-03-02
Dynamic cache coherency snooper presence with variable snoop latency Grant 6,985,972 - Dieffenderfer , et al. January 10, 2	2006-01-10
System and method for adaptive run-time reconfiguration for a reconfigurable instruction set co-processor architecture App 20060004987 - Asaad; Sameh W. ; et al.	2006-01-05
System and method for providing improved bus utilization via target directed completion Grant 6,973,520 - Drerup , et al. December 6, 2	2005-12-06
Method and system for efficiently generating parameterized bus transactions Grant 6,970,816 - Bryan , et al. November 29, 2	2005-11-29
System and method for forwarding interrupt requests App 20050210174 - Hofmann, Richard Gerard ; et al.	2005-09-22
Multiple address two channel bus structure App 20050182884 - Hofmann, Richard Gerard ; et al.	2005-08-18
Scalable bus structure App 20050172063 - Hofmann, Richard Gerard ; et al.	2005-08-04
Method for moving snoop pushes to the front of a request queue Grant 6,907,502 - Augsburg , et al. June 14, 2	2005-06-14
System on a chip bus with automatic pipeline stage insertion for timing closure App 20050055655 - Augsburg, Victor Roberts ; et al.	2005-03-10
Scalable on-chip bus performance monitoring synchronization mechanism and method of use Grant 6,857,029 - Ganasan , et al. February 15, 2	2005-02-15
System on a chip bus with automatic pipeline stage insertion for timing closure Grant 6,834,378 - Augsburg , et al. December 21, 2	2004-12-21
Ensuring orderly forward progress in granting snoop castout requests App 20040255085 - Dieffenderfer, James Norris ; et al.	2004-12-16
Reducing power in a snooping cache based multiprocessor environment Grant 6,826,656 - Augsburg , et al. November 30, 2	2004-11-30
N-way psuedo cross-bar having an arbitration feature using discrete processor local busses Grant 6,823,411 - Hofmann , et al. November 23, 2	2004-11-23
Multiprocessor environment supporting variable-sized coherency transactions Grant 6,807,608 - Augsburg , et al. October 19, 2	2004-10-19
Multi-master computer system with overlapped read and write operations and scalable address pipelining Grant 6,772,254 - Hofmann , et al. August 3, 2	2004-08-03
Reordering of requests between an initiator and the request queue of a bus controller App 20040068603 - Augsburg, Victor Roberts ; et al.	2004-04-08
Method for moving snoop pushes to the front of a request queue App 20040068623 - Augsburg, Victor Roberts ; et al.	2004-04-08
System on a chip bus with automatic pipeline stage insertion for timing closure App 20040068707 - Augsburg, Victor Roberts ; et al.	2004-04-08
System and method for providing improved bus utilization via target directed completion App 20040010644 - Drerup, Bernard Charles ; et al.	2004-01-15
Scalable on-chip bus performance monitoring synchronization mechanism and method of use App 20030204650 - Ganasan, Jaya Prakash Subramaniam ; et al.	2003-10-30
Method and system for optimizing data transfers between devices interconnected by buses operating at different clocking speeds Grant 6,633,994 - Hofmann , et al. October 14, 2	2003-10-14
Multiprocessor environment supporting variable-sized coherency transactions App 20030159005 - Augsburg, Victor Roberts ; et al.	2003-08-21
N-way pseudo cross-bar using discrete processor local busses App 20030145144 - Hofmann, Richard Gerard ; et al.	2003-07-31
Reducing power in a snooping cache based multiprocessor environment App 20030145174 - Augsburg, Victor Roberts ; et al.	2003-07-31
Dynamic data bus allocation Grant 6,587,905 - Correale, Jr. , et al. July 1, 2	2003-07-01
Dual burst latency timers for overlapped read and write data transfers Grant 6,513,089 - Hofmann , et al. January 28, 2	2003-01-28
Multi-master computer system with overlapped read and write operations and scalable address pipelining App 20020062414 - Hofmann, Richard Gerard ; et al.	2002-05-23
Processor local bus posted DMA FlyBy burst transfers Grant 6,055,584 - Bridges , et al. April 25, 2	2000-04-25

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.