Trademark applications and grants for Ho Wai Yan. Ho Wai Yan has 8 trademark applications. The latest application filed is for "HIERARCHICAL STITCHING"
Patent Application | Date |
---|---|
Layout overlap detection with selective flattening in computer implemented integrated circuit design 6,011,911 - 08/940,162 Ho , et al. January 4, 2 | 2000-01-04 |
Selective flattening in layout areas in computer implemented integrated circuit design 6,009,250 - 08/940,354 Ho , et al. December 28, 1 | 1999-12-28 |
Apparatus and method for emulating a microelectronic device by interconnecting and running test vectors on physically implemented functional modules 5,581,742 - 08/352,680 Lin , et al. December 3, 1 | 1996-12-03 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.