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Patent applications and USPTO patent grants for Ho; Jonathan Jung-Ching.The latest application filed is for "double exposure semiconductor process for improved process margin".
Patent | Date |
---|---|
Interconnect structure Grant 8,384,164 - Ho February 26, 2 | 2013-02-26 |
Double exposure semiconductor process for improved process margin Grant 7,951,722 - Ho May 31, 2 | 2011-05-31 |
Method of fabricating CMOS devices using fluid-based dielectric materials Grant 7,737,020 - Ho , et al. June 15, 2 | 2010-06-15 |
Method and apparatus for compensating an integrated circuit layout for mechanical stress effects Grant 7,673,270 - Wang , et al. March 2, 2 | 2010-03-02 |
Double exposure semiconductor process for improved process margin App 20090042389 - Ho; Jonathan Jung-Ching | 2009-02-12 |
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