HO; JAR-MING

Patent Applications and Registrations

Patent applications and USPTO patent grants for HO; JAR-MING.The latest application filed is for "semiconductor device with thermal release layer and method for fabricating the same".

Company Profile

2.16.20

HO; JAR-MING - TAIPEI CITY TW
Ho; Jar-Ming - Taipei TW
Ho; Jar-Ming - Taoyuan County N/A TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Semiconductor Device With Thermal Release Layer And Method For Fabricating The Same App 20220189847 - HO; JAR-MING	2022-06-16
Semiconductor Device With Thermal Release Layer And Method For Fabricating The Same App 20220165639 - HO; Jar-Ming	2022-05-26
Semiconductor Device With Carbon Hard Mask And Method For Fabricating The Same App 20220157713 - HO; JAR-MING	2022-05-19
Semiconductor Device With Carbon Hard Mask And Method For Fabricating The Same App 20220157712 - HO; Jar-Ming	2022-05-19
Semiconductor device with air gap in pattern-dense region and method for forming the same Grant 11,309,186 - Ho April 19, 2	2022-04-19
Method For Preparing Semiconductor Device With Air Gap In Pattern-dense Region App 20220059355 - HO; JAR-MING	2022-02-24
Method For Fabricating Semiconductor Device App 20210351190 - HO; JAR-MING	2021-11-11
Semiconductor Device With Air Gap In Pattern-dense Region And Method For Forming The Same App 20210335614 - HO; Jar-Ming	2021-10-28
Semiconductor device and method for fabricating the same Grant 11,145,605 - Ho October 12, 2	2021-10-12
Semiconductor device and method for fabricating the same Grant 11,133,319 - Ho September 28, 2	2021-09-28
Semiconductor Device And Method For Fabricating The Same App 20210118813 - HO; Jar-Ming	2021-04-22
Semiconductor Device And Method For Fabricating The Same App 20210091089 - HO; Jar-Ming	2021-03-25
Semiconductor structure and method for manufacturing the same Grant 10,741,750 - Ho A	2020-08-11
Semiconductor Structure And Method For Manufacturing The Same App 20200194665 - HO; JAR-MING	2020-06-18
Method for forming self-aligned contact Grant 8,487,397 - Ho , et al. July 16, 2	2013-07-16
Method for forming conductive contact Grant 8,298,939 - Ho , et al. October 30, 2	2012-10-30
Method For Forming Self-aligned Contact App 20120267727 - Ho; Jar-Ming ; et al.	2012-10-25
Method for forming conductive contact Grant 8,288,279 - Ho , et al. October 16, 2	2012-10-16
Antifuse element for integrated circuit device Grant 8,278,732 - Ho , et al. October 2, 2	2012-10-02
Method for fabricating intra-device isolation structure Grant 8,178,418 - Ho , et al. May 15, 2	2012-05-15
Method for fabricating a semiconductor device Grant 8,093,639 - Ho , et al. January 10, 2	2012-01-10
Semiconductor device and fabricating method thereof Grant 7,955,927 - Lin , et al. June 7, 2	2011-06-07
Method For Fabricating A Semiconductor Device App 20100133608 - Ho; Jar-Ming ; et al.	2010-06-03
Method for fabricating a semiconductor device Grant 7,709,318 - Ho , et al. May 4, 2	2010-05-04
Semiconductor structure and the forming method thereof Grant 7,622,381 - Ho , et al. November 24, 2	2009-11-24
Method for fabricating recessed-gate MOS transistor device Grant 7,553,737 - Huang , et al. June 30, 2	2009-06-30
Method for fabricating recessed gate MOS transistor device Grant 7,510,930 - Lee , et al. March 31, 2	2009-03-31
Semiconductor Device And Fabricating Method Thereof App 20090008692 - Lin; Shian-Jyh ; et al.	2009-01-08
Method For Fabricating Mos Transistor With Recess Channel App 20080318388 - Lin; Shian-Jyh ; et al.	2008-12-25
Semiconductor Structure And The Forming Method Thereof App 20080217779 - Ho; Jar-Ming ; et al.	2008-09-11
Method For Fabricating Recessed-gate Mos Transistor Device App 20080032476 - Huang; Ming-Yuan ; et al.	2008-02-07
Method For Fabricating Recessed Gate Mos Transistor Device App 20070264772 - Lee; Yu-Pi ; et al.	2007-11-15
Semiconductor device and fabrication thereof App 20070228435 - Ho; Jar-Ming ; et al.	2007-10-04
Method For Fabricating A Semiconductor Device App 20070210375 - Ho; Jar-Ming ; et al.	2007-09-13
Method To Define A Pattern Having Shrunk Critical Dimension App 20070155179 - Ho; Jar-Ming ; et al.	2007-07-05

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.