| Patent | Date |
|---|
Deep trench MIM capacitor and moat isolation with epitaxial semiconductor wafer scheme
Grant 9,171,848 - Dyer , et al. October 27, 2 | 2015-10-27 |
High-K and metal filled trench-type EDRAM capacitor with electrode depth and dimension control
Grant 9,059,194 - Brodsky , et al. June 16, 2 | 2015-06-16 |
Methods for Deep Trench MIM Capacitor Moat Isolation with N+ Epitaxial Semiconductor Wafer Scheme
App 20150145102 - Dyer; Thomas Walter ; et al. | 2015-05-28 |
High-k And Metal Filled Trench-type Edram Capacitor With Electrode Depth And Dimension Control
App 20150102463 - Brodsky; Colin J. ; et al. | 2015-04-16 |
High-K and Metal Filled Trench-Type EDRAM Capacitor with Electrode Depth and Dimension Control
App 20140191366 - Brodsky; Colin J. ; et al. | 2014-07-10 |
Capacitor with deep trench ion implantation
Grant 8,642,440 - Pei , et al. February 4, 2 | 2014-02-04 |
Capacitor With Deep Trench Ion Implantation
App 20130099354 - Pei; Chengwen ; et al. | 2013-04-25 |
DRAM with schottky barrier FET and MIM trench capacitor
Grant 8,343,864 - Goyal , et al. January 1, 2 | 2013-01-01 |
Dram With Schottky Barrier Fet And Mim Trench Capacitor
App 20120248522 - Goyal; Puneet ; et al. | 2012-10-04 |
Metal gate integration structure and method including metal fuse, anti-fuse and/or resistor
Grant 8,159,040 - Coolbaugh , et al. April 17, 2 | 2012-04-17 |
Trench metal-insulator-metal (MIM) capacitors integrated with middle-of-line metal contacts, and method of fabricating same
Grant 7,682,896 - Ho , et al. March 23, 2 | 2010-03-23 |
Metal Gate Integration Structure And Method Including Metal Fuse, Anti-fuse And/or Resistor
App 20090283840 - Coolbaugh; Douglas D. ; et al. | 2009-11-19 |
Self-aligned, silicided, trench-based DRAM/eDRAM processes with improved retention
Grant 7,564,086 - Kwon , et al. July 21, 2 | 2009-07-21 |
Ferromagnetic memory cell and methods of making and using the same
Grant 7,491,994 - Cheng , et al. February 17, 2 | 2009-02-17 |
SELF-ALIGNED, SILICIDED, TRENCH-BASED DRAM/eDRAM PROCESSES WITH IMPROVED RETENTION
App 20070235792 - Kwon; Oh-Jung ; et al. | 2007-10-11 |
Trench Metal-insulator-metal (mim) Capacitors Integrated With Middle-of-line Metal Contacts, And Method Of Fabricating Same
App 20070218625 - Ho; Herbert Lei ; et al. | 2007-09-20 |
Trench Metal-insulator-metal (mim) Capacitors Integrated With Middle-of-line Metal Contacts, And Method Of Fabricating Same
App 20070057302 - Ho; Herbert Lei ; et al. | 2007-03-15 |
Ferromagnetic memory cell and methods of making and using the same
App 20070045686 - Cheng; Kangguo ; et al. | 2007-03-01 |
Self-aligned, silicided, trench-based, DRAM/EDRAM processes with improved retention
Grant 7,153,737 - Kwon , et al. December 26, 2 | 2006-12-26 |
Self-aligned, Silicided, Trench-based, Dram/edram Processes With Improved Retention
App 20060160298 - Kwon; Oh-Jung ; et al. | 2006-07-20 |
Method for patterning a silicon-on-insulator photomask
App 20030028855 - Bard, Karen Ann ; et al. | 2003-02-06 |
Method of controllably forming a LOCOS oxide layer over a portion of a vertically extending sidewall of a trench extending into a semiconductor substrate
Grant 6,153,474 - Ho , et al. November 28, 2 | 2000-11-28 |
Deep trench with enhanced sidewall surface area
Grant 6,015,985 - Ho , et al. January 18, 2 | 2000-01-18 |
High dielectric TiO.sub.2 -SiN composite films for memory applications
Grant 6,014,310 - Bronner , et al. January 11, 2 | 2000-01-11 |
High dielectric TiO.sub.2 -SiN composite films for memory applications
Grant 5,876,788 - Bronner , et al. March 2, 1 | 1999-03-02 |
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