Ho; Ernes

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ho; Ernes.The latest application filed is for "3 transistor (n/p/n) non-volatile memory cell without program disturb".

Company Profile

0.7.4

Ho; Ernes - Sunnyvale CA
Ho; Ernes - Campbell CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
5-transistor non-volatile memory cell Grant 8,284,600 - Poplevine , et al. October 9, 2	2012-10-09
4-transistor non-volatile memory cell with PMOS-NMOS-PMOS-NMOS structure Grant 8,213,227 - Poplevine , et al. July 3, 2	2012-07-03
Method of directly reading output voltage to determine data stored in a non-volatile memory cell Grant 8,159,877 - Poplevine , et al. April 17, 2	2012-04-17
3 Transistor (n/p/n) Non-volatile Memory Cell Without Program Disturb App 20120014183 - Poplevine; Pavel ; et al.	2012-01-19
4-transistor Non-volatile Memory Cell With Pmos-nmos-pmos-nmos Structure App 20110242898 - Poplevine; Pavel ; et al.	2011-10-06
Method Of Directly Reading Output Voltage To Determine Data Stored In A Non-volatile Memory Cell App 20110235425 - Poplevine; Pavel ; et al.	2011-09-29
Method of making a non-volatile memory (NVM) cell structure and program biasing techniques for the NVM cell structure Grant 7,602,641 - Poplevine , et al. October 13, 2	2009-10-13
Method of making a non-volatile memory (NVM) cell structure and program biasing techniques for the NVM cell structure App 20090129162 - Poplevine; Pavel ; et al.	2009-05-21
Non-volatile memory cell with improved programming technique and density Grant 7,453,726 - Poplevine , et al. November 18, 2	2008-11-18
Low power ROM architecture Grant 7,126,866 - Poplevine , et al. October 24, 2	2006-10-24
High density ROM architecture Grant 6,642,587 - Poplevine , et al. November 4, 2	2003-11-04

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