loadpatents
name:-0.022662878036499
name:-0.012163877487183
name:-0.0079817771911621
HO; CHUNG-HSIUNG Patent Filings

HO; CHUNG-HSIUNG

Patent Applications and Registrations

Patent applications and USPTO patent grants for HO; CHUNG-HSIUNG.The latest application filed is for "method for manufacturing side wettable package".

Company Profile
7.9.18
  • HO; CHUNG-HSIUNG - Kaohsiung City TW
  • Ho; Chung-Hsiung - Kaohsiung TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method For Manufacturing Side Wettable Package
App 20220246561 - HO; CHUNG-HSIUNG ;   et al.
2022-08-04
Side wettable package
Grant 11,387,203 - Ho , et al. July 12, 2
2022-07-12
Thin Semiconductor Package And Manufacturing Method Thereof
App 20220157707 - Ho; Chung-Hsiung ;   et al.
2022-05-19
Method For Manufacturing A Semiconductor Package Having A Conductive Pad With An Anchor Flange
App 20220122904 - HO; CHUNG-HSIUNG ;   et al.
2022-04-21
Side Wettable Package And Method For Manufacturing The Same
App 20220077086 - HO; CHUNG-HSIUNG ;   et al.
2022-03-10
Semiconductor Package And Method For Manufacturing The Same
App 20220005749 - HO; CHUNG-HSIUNG ;   et al.
2022-01-06
Semiconductor Package Structure And Fabricating Method Of The Same
App 20210225662 - Ho; Chung-Hsiung ;   et al.
2021-07-22
Chip-scale package device
Grant 11,049,781 - Ho June 29, 2
2021-06-29
Semiconductor device with conductive film shielding
Grant 10,825,781 - Kang , et al. November 3, 2
2020-11-03
Semiconductor Device With Conductive Film Shielding
App 20200043862 - Kang; Chia Hao ;   et al.
2020-02-06
Solderless inter-component joints
Grant 10,390,440 - Lo , et al. A
2019-08-20
Solderless Inter-component Joints
App 20190239361 - Lo; Tsung Nan ;   et al.
2019-08-01
Wafer Level Package And Method Of Assembling Same
App 20190088504 - HO; CHUNG HSIUNG
2019-03-21
IC packaging method and a packaged IC device
Grant 10,211,071 - Ho , et al. Feb
2019-02-19
Multi-via redistribution layer for integrated circuits having solder balls
Grant 10,192,837 - Ho , et al. Ja
2019-01-29
Integrated circuits and methods therefor
Grant 10,177,021 - Ho , et al. J
2019-01-08
Wafer level package with EMI shielding
Grant 10,008,454 - Ho June 26, 2
2018-06-26
Wafer-level chip scale package with side protection
Grant 9,892,989 - Ho , et al. February 13, 2
2018-02-13
Ic Packaging Method And A Packaged Ic Device
App 20170221728 - Ho; Chung Hsiung ;   et al.
2017-08-03
Integrated Circuits And Methods Therefor
App 20170200657 - Ho; Chung Hsiung ;   et al.
2017-07-13
Dicing Of Low-k Wafers
App 20160148842 - Ho; Chung Hsiung ;   et al.
2016-05-26
Metal Shielding on Die Level
App 20140264784 - Ho; Chung Hsiung ;   et al.
2014-09-18
Film Based Ic Packaging Method And A Packaged Ic Device
App 20130299955 - Chang; Ching Hui ;   et al.
2013-11-14
Stacked-die Package And Method Therefor
App 20130157414 - Ho; Chung Hsiung ;   et al.
2013-06-20
Non-metal Stiffener Ring For Fcbga
App 20120188721 - HO; Chung Hsiung ;   et al.
2012-07-26
Substrate testing apparatus with full contact configuration
App 20060091384 - Ho; Chung-Hsiung ;   et al.
2006-05-04

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