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Patent applications and USPTO patent grants for Ho; Chih-Chien.The latest application filed is for "packaged isolation barrier with integrated magnetics".
Patent | Date |
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Packaged electronic device with split die pad in robust package substrate Grant 11,444,012 - Chien , et al. September 13, 2 | 2022-09-13 |
Leadframe with vertically spaced die attach pads Grant 11,342,247 - Chang , et al. May 24, 2 | 2022-05-24 |
Packaged Isolation Barrier With Integrated Magnetics App 20210375525 - Kao; Ying-Chuan ;   et al. | 2021-12-02 |
Packaged Electronic Device With Split Die Pad In Robust Package Substrate App 20210305139 - Chien; Yuh-Harng ;   et al. | 2021-09-30 |
Electronic device with three dimensional thermal pad Grant 11,081,428 - Chou , et al. August 3, 2 | 2021-08-03 |
Electronic Device With Three Dimensional Thermal Pad App 20210043548 - Chou; Stanley ;   et al. | 2021-02-11 |
Method of making a wire support leadframe for a semiconductor device Grant 10,811,343 - Chien , et al. October 20, 2 | 2020-10-20 |
Leadframe With Vertically Spaced Die Attach Pads App 20200185308 - Chang; Chia-Yu ;   et al. | 2020-06-11 |
Leadframe with vertically spaced die attach pads Grant 10,600,724 - Chang , et al. | 2020-03-24 |
Leadframe Grant 10,573,581 - Ho , et al. Feb | 2020-02-25 |
Wire support for a leadframe Grant 10,529,654 - Chien , et al. J | 2020-01-07 |
Dam Laminate Isolation Substrate App 20190385899 - Ko; Chang-Yen ;   et al. | 2019-12-19 |
Dam laminate isolation substrate Grant 10,395,971 - Ko , et al. A | 2019-08-27 |
Dam Laminate Isolation Substrate App 20190198383 - KO; Chang-Yen ;   et al. | 2019-06-27 |
Method Of Making A Wire Support Leadframe For A Semiconductor Device App 20190172776 - CHIEN; YUH-HARNG ;   et al. | 2019-06-06 |
Method of making a wire support leadframe for a semiconductor device Grant 10,229,868 - Chien , et al. | 2019-03-12 |
Packaged semiconductor device having multi-level leadframes configured as modules Grant 10,211,132 - Chang , et al. Feb | 2019-02-19 |
Wire Support For A Leadframe App 20190027429 - CHIEN; YUH-HARNG ;   et al. | 2019-01-24 |
Wire support for a leadframe Grant 10,121,733 - Chien , et al. November 6, 2 | 2018-11-06 |
Semiconductor Package Having A Leadframe With Multi-level Assembly Pads App 20180211905 - Chang; Chia-Yu ;   et al. | 2018-07-26 |
Method Of Making A Wire Support Leadframe For A Semiconductor Device App 20180174950 - Chien; Yuh-Harng ;   et al. | 2018-06-21 |
Leadframe App 20180090419 - Ho; Chih-Chien ;   et al. | 2018-03-29 |
Semiconductor package having a leadframe with multi-level assembly pads Grant 9,922,908 - Chang , et al. March 20, 2 | 2018-03-20 |
Leadframe With Vertically Spaced Die Attach Pads App 20170330822 - Chang; Chia-Yu ;   et al. | 2017-11-16 |
Wire Support for a Leadframe App 20170194236 - Chien; Yuh-Harng ;   et al. | 2017-07-06 |
Semiconductor Package Having A Leadframe With Multi-level Assembly Pads App 20170179007 - Chang; Chia-Yu ;   et al. | 2017-06-22 |
Method of making a wire support leadframe for a semiconductor device Grant 9,627,331 - Chien , et al. April 18, 2 | 2017-04-18 |
Package substrate having die pad with outer raised portion and interior recessed portion Grant 8,546,184 - Ho , et al. October 1, 2 | 2013-10-01 |
Package substrate having die pad with outer raised portion and interior recessed portion Grant 8,455,989 - Ho , et al. June 4, 2 | 2013-06-04 |
Package Substrate Having Die Pad with Outer Raised Portion and Interior Recessed Portion App 20130122654 - Ho; Chih-Chien ;   et al. | 2013-05-16 |
Package Substrate Having Die Pad With Outer Raised Portion And Interior Recessed Portion App 20130001760 - HO; CHIH-CHIEN ;   et al. | 2013-01-03 |
Wafer positioning systems and methods thereof Grant 7,387,484 - Ho , et al. June 17, 2 | 2008-06-17 |
Wafer positioning systems and methods thereof App 20070140826 - Ho; Chih-Chien ;   et al. | 2007-06-21 |
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