loadpatents
name:-0.0064539909362793
name:-0.013022184371948
name:-0.0036320686340332
HO; Chien-Hsin Patent Filings

HO; Chien-Hsin

Patent Applications and Registrations

Patent applications and USPTO patent grants for HO; Chien-Hsin.The latest application filed is for "interconnect structure without barrier layer on bottom surface of via".

Company Profile
3.4.5
  • HO; Chien-Hsin - Taichung City TW
  • Ho; Chien-Hsin - Taichung TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Interconnect Structure without Barrier Layer on Bottom Surface of Via
App 20220262675 - Kuo; Tz-Jun ;   et al.
2022-08-18
Interconnect structure without barrier layer on bottom surface of via
Grant 11,322,391 - Kuo , et al. May 3, 2
2022-05-03
Interconnect Structure Without Barrier Layer On Bottom Surface Of Via
App 20200035546 - KUO; Tz-Jun ;   et al.
2020-01-30
Interconnect structure without barrier layer on bottom surface of via
Grant 10,453,740 - Kuo , et al. Oc
2019-10-22
Interconnect Structure Without Barrier Layer On Bottom Surface Of Via
App 20190006230 - KUO; Tz-Jun ;   et al.
2019-01-03
Method of forming an interconnection
Grant 9,842,767 - Lee , et al. December 12, 2
2017-12-12
Method Of Semiconductor Integrated Circuit Fabrication
App 20150017799 - Lee; Ming-Han ;   et al.
2015-01-15
Method of semiconductor integrated circuit fabrication
Grant 8,749,060 - Lee , et al. June 10, 2
2014-06-10
Method Of Semiconductor Integrated Circuit Fabrication
App 20140084469 - Lee; Ming Han ;   et al.
2014-03-27

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