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Patent applications and USPTO patent grants for Hiroki; Akira.The latest application filed is for "double-rod type shock absorber".
Patent | Date |
---|---|
Double-rod type shock absorber Grant 9,366,306 - Miyasato , et al. June 14, 2 | 2016-06-14 |
Double-rod Type Shock Absorber App 20150198212 - Miyasato; Eiko ;   et al. | 2015-07-16 |
Hydraulic shock absorber Grant 8,857,583 - Miyasato , et al. October 14, 2 | 2014-10-14 |
Hydraulic shock absorber Grant 8,757,338 - Miyasato , et al. June 24, 2 | 2014-06-24 |
Hydraulic Shock Absorber App 20130015027 - Miyasato; Eiko ;   et al. | 2013-01-17 |
Hydraulic Shock Absorber App 20120247891 - MIYASATO; Eiko ;   et al. | 2012-10-04 |
Fluid pressure cylinder apparatus having throttle valve Grant 7,526,993 - Hiroki , et al. May 5, 2 | 2009-05-05 |
Fluid pressure cylinder apparatus having throttle valve App 20070017363 - Hiroki; Akira ;   et al. | 2007-01-25 |
Complementary semiconductor device and method for producing the same Grant 6,031,268 - Hiroki , et al. February 29, 2 | 2000-02-29 |
MOS type semiconductor device having an impurity diffusion layer with a nonuniform impurity concentration profile in a channel region Grant 6,031,272 - Hiroki , et al. February 29, 2 | 2000-02-29 |
Method for forming complementary MOS device having asymmetric region in channel region Grant 5,830,788 - Hiroki , et al. November 3, 1 | 1998-11-03 |
MIS transistor with gate sidewall insulating layer Grant 5,808,347 - Kurimoto , et al. September 15, 1 | 1998-09-15 |
MOS transistor and its fabricating method Grant 5,518,944 - Hiroki , et al. May 21, 1 | 1996-05-21 |
MOS type semiconductor device having a low concentration impurity diffusion region Grant 5,512,771 - Hiroki , et al. April 30, 1 | 1996-04-30 |
LDD FET with polysilicon sidewalls Grant 5,386,133 - Hiroki , et al. January 31, 1 | 1995-01-31 |
Method of proudcing a MIS transistor Grant 5,221,632 - Kurimoto , et al. June 22, 1 | 1993-06-22 |
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