Hintze; Bernd

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hintze; Bernd.The latest application filed is for "method including a formation of a diffusion barrier and semiconductor structure including a diffusion barrier".

Company Profile

0.10.15

Hintze; Bernd - Langerbrueck DE
Hintze; Bernd - Langebrueck DE
Hintze; Bernd - Langebruck DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method including a formation of a diffusion barrier and semiconductor structure including a diffusion barrier Grant 10,090,195 - Koschinsky , et al. October 2, 2	2018-10-02
Method Including A Formation Of A Diffusion Barrier And Semiconductor Structure Including A Diffusion Barrier App 20170117179 - Koschinsky; Frank ; et al.	2017-04-27
Methods For Fabricating Integrated Circuits Including Barrier Layers For Interconnect Structures App 20150325467 - Zhang; Xunyuan ; et al.	2015-11-12
Methods for fabricating integrated circuits including barrier layers for interconnect structures Grant 9,177,858 - Zhang , et al. November 3, 2	2015-11-03
Methods of forming metal nitride materials Grant 9,177,826 - Hintze , et al. November 3, 2	2015-11-03
Method including an etching of a portion of an interlayer dielectric in a semiconductor structure, a degas process and a preclean process Grant 9,171,754 - Koschinsky , et al. October 27, 2	2015-10-27
Method for detecting defects in a diffusion barrier layer Grant 9,147,618 - Koschinsky , et al. September 29, 2	2015-09-29
Method For Detecting Defects In A Diffusion Barrier Layer App 20150111316 - Koschinsky; Frank ; et al.	2015-04-23
Method Including A Removal Of A Hardmask From A Semiconductor Structure And Rinsing The Semiconductor Structure With An Alkaline Rinse Solution App 20140349479 - Mieth; Oliver ; et al.	2014-11-27
Method Including An Etching Of A Portion Of An Interlayer Dielectric In A Semiconductor Structure, A Degas Process And A Preclean Process App 20140349478 - Koschinsky; Frank ; et al.	2014-11-27
Methods Of Forming Barrier Layers For Conductive Copper Structures App 20140273436 - Hintze; Bernd ; et al.	2014-09-18
Processes For Forming Integrated Circuits With Post-patterning Treament App 20140024213 - Hintze; Bernd ; et al.	2014-01-23
Methods of Forming Metal Nitride Materials App 20130203266 - Hintze; Bernd ; et al.	2013-08-08
Interconnect structure for semiconductor devices Grant 8,138,538 - Moll , et al. March 20, 2	2012-03-20
Method for producing a dielectric interlayer and storage capacitor with such a dielectric interlayer Grant 7,880,212 - Hintze , et al. February 1, 2	2011-02-01
Interconnect Structure For Semiconductor Devices App 20100090264 - Moll; Hans-Peter ; et al.	2010-04-15
Method of producing a conductive layer including two metal nitrides Grant 7,531,418 - Hintze , et al. May 12, 2	2009-05-12
Method For Producing A Dielectric Interlayer And Storage Capacitor With Such A Dielectric Interlayer App 20080316675 - Hintze; Bernd ; et al.	2008-12-25
Method Of Fabricating An Integrated Circuit App 20080282535 - Sundqvist; Jonas ; et al.	2008-11-20
Method for producing a dielectric interlayer and storage capacitor with such a dielectric interlayer Grant 7,416,952 - Hintze , et al. August 26, 2	2008-08-26
Method for producing a dielectric interlayer and storage capacitor with such a dielectric interlayer App 20070272965 - Hintze; Bernd ; et al.	2007-11-29
Method for producing a conductive layer App 20060128128 - Hintze; Bernd ; et al.	2006-06-15

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