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name:-0.012375831604004
name:-0.018965005874634
name:-0.0052051544189453
Hinrichs; Jeffrey Mark Patent Filings

Hinrichs; Jeffrey Mark

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hinrichs; Jeffrey Mark.The latest application filed is for "partitioned digital-to-analog converter system".

Company Profile
5.17.12
  • Hinrichs; Jeffrey Mark - San Diego CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Delay interpolator
Grant 11,190,174 - Hinrichs November 30, 2
2021-11-30
Delay locked loop with segmented delay circuit
Grant 11,171,654 - Hinrichs November 9, 2
2021-11-09
Partitioned digital-to-analog converter system
Grant 10,958,279 - Bhatta , et al. March 23, 2
2021-03-23
Partitioned Digital-to-analog Converter System
App 20210075434 - BHATTA; Debesh ;   et al.
2021-03-11
Clock screening with programmable counter-based clock interface and time-to-digital converter with high resolution and wide range operation
Grant 10,707,854 - Wu , et al.
2020-07-07
Low-dropout regulator with band-reject power supply rejection ratio for phase locked loop voltage controlled oscillator
Grant 10,663,993 - Song , et al.
2020-05-26
Clock Screening With Programmable Counter-based Clock Interface And Time-to-digital Converter With High Resolution And Wide Rang
App 20200083873 - WU; Zhengzheng ;   et al.
2020-03-12
Clock screening with programmable counter-based clock interface and time-to-digital converter with high resolution and wide range operation
Grant 10,520,901 - Wu , et al. Dec
2019-12-31
Glitch free phase selection multiplexer enabling fractional feedback ratios in phase locked loops
Grant 10,484,027 - Bhatta , et al. Nov
2019-11-19
Clock Screening With Programmable Counter-based Clock Interface And Time-to-digital Converter With High Resolution And Wide Rang
App 20190268010 - Wu; Zhengzheng ;   et al.
2019-08-29
Bias circuit for temperature-compensated varactor
Grant 10,340,922 - Chen , et al.
2019-07-02
High impedance passive switched capacitor common mode feedback network
Grant 10,122,370 - Bhatta , et al. November 6, 2
2018-11-06
Glitch Free Phase Selection Multiplexer Enabling Fractional Feedback Ratios In Phase Locked Loops
App 20180138934 - Bhatta; Debesh ;   et al.
2018-05-17
High Impedance Passive Switched Capacitor Common Mode Feedback Network
App 20180123602 - BHATTA; Debesh ;   et al.
2018-05-03
Low-dropout Regulator With Band-reject Power Supply Rejection Ratio For Phase Locked Loop Voltage Controlled Oscillator
App 20180017982 - SONG; Tongyu ;   et al.
2018-01-18
Fully differential charge pump with switched-capacitor common-mode feedback
Grant 9,496,880 - Yin , et al. November 15, 2
2016-11-15
High-speed AC-coupled inverter-based buffer with replica biasing
Grant 9,473,120 - Yin , et al. October 18, 2
2016-10-18
Reference current generator with switch capacitor
Grant 9,356,509 - Hinrichs May 31, 2
2016-05-31
Clock doubler including duty cycle correction
Grant 9,124,250 - Hinrichs September 1, 2
2015-09-01
Ring oscillator circuit and method
Grant 9,099,995 - Hinrichs , et al. August 4, 2
2015-08-04
Clock Doubler Including Duty Cycle Correction
App 20150035570 - Hinrichs; Jeffrey Mark
2015-02-05
Reference Current Generator
App 20150035513 - Hinrichs; Jeffrey Mark
2015-02-05
Ring Oscillator Circuit And Method
App 20140266475 - Hinrichs; Jeffrey Mark ;   et al.
2014-09-18
Look-up table delta-sigma conversion
Grant 7,190,288 - Robinson , et al. March 13, 2
2007-03-13
Digital frequency synthesis
Grant 7,130,327 - Robinson , et al. October 31, 2
2006-10-31
Conversion employing delta-sigma modulation
Grant 6,873,280 - Robinson , et al. March 29, 2
2005-03-29
Look-up table delta-sigma conversion
App 20040263365 - Robinson, Ian Stuart ;   et al.
2004-12-30
Digital frequency synthesis
App 20040264547 - Robinson, Ian Stuart ;   et al.
2004-12-30
Conversion employing delta-sigma modulation
App 20040252038 - Robinson, Ian Stuart ;   et al.
2004-12-16

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