Hines; Mitchell W
Patent Applications and Registrations
Patent applications and USPTO patent grants for Hines; Mitchell W.The latest application filed is for "power domain crossing interface analysis".
- Hines; Mitchell W - San Jose CA
- Hines; Mitchell W. - San Jose CA
| Patent | Date |
|---|---|
| Power domain crossing interface analysis Grant 8,683,419 - Hines , et al. March 25, 2 | 2014-03-25 |
| Method and mechanism for implementing electronic designs having power information specifications background Grant RE44,479 - Wang , et al. September 3, 2 | 2013-09-03 |
| High level IC design with power specification and power source hierarchy Grant 7,954,078 - Wang , et al. May 31, 2 | 2011-05-31 |
| Method and apparatus for verification of memories at multiple abstraction levels Grant 6,848,084 - Pandey , et al. January 25, 2 | 2005-01-25 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.
| 