Hill; Anthony M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hill; Anthony M..The latest application filed is for "time-interleaved current feedback droop function for multiphase buck converters".

Company Profile

0.13.10

Hill; Anthony M. - Dallas TX
Hill; Anthony M - Dallas TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Time-interleaved current feedback droop function for multiphase buck converters Grant 10,439,497 - Wu , et al. O	2019-10-08
Time-Interleaved Current Feedback Droop Function for Multiphase Buck Converters App 20180054125 - Wu; Jian-Yi ; et al.	2018-02-22
Time-interleaved current feedback droop function for multiphase buck converters Grant 9,806,619 - Wu , et al. October 31, 2	2017-10-31
Time-interleaved Current Feedback Droop Function For Multiphase Buck Converters App 20170025950 - Wu; Jian-Yi ; et al.	2017-01-26
Accurate integrated circuit performance prediction using on-board sensors Grant 8,762,087 - Joshi , et al. June 24, 2	2014-06-24
Closed loop adaptive voltage scaling Grant 8,547,164 - Flores , et al. October 1, 2	2013-10-01
Closed Loop Adaptive Voltage Scaling App 20120075005 - Flores; Jose Luis ; et al.	2012-03-29
Accurate Integrated Circuit Performance Prediction Using On-Board Sensors App 20080120065 - Joshi; Mayur ; et al.	2008-05-22
Accurate noise modeling in digital designs Grant 7,363,604 - Hill , et al. April 22, 2	2008-04-22
Method for circuit sensitivity driven parasitic extraction Grant 7,318,208 - Narasimha , et al. January 8, 2	2008-01-08
Accurate noise modeling in digital designs App 20070079265 - Hill; Anthony M. ; et al.	2007-04-05
On-chip reset circuitry and method Grant 7,039,823 - Hales , et al. May 2, 2	2006-05-02
Method for circuit sensitivity driven parasitic extraction App 20060085776 - Narasimha; Usha ; et al.	2006-04-20
Power reduction in scannable D-flip-flop with synchronous preset or clear Grant 6,986,089 - Hill , et al. January 10, 2	2006-01-10
On-chip reset circuitry and method App 20030204713 - Hales, Alan D. ; et al.	2003-10-30
Power reduction in scannable D-flip-flop with synchronous preset or clear App 20030110432 - Hill, Anthony M. ; et al.	2003-06-12
Cell-based noise characterization and evaluation App 20030079191 - Savithri, Nagaraj N. ; et al.	2003-04-24
Cell-based noise characterization and evaluation Grant 6,493,853 - Savithri , et al. December 10, 2	2002-12-10
Integrated NAND and flip-flop circuit App 20020113624 - Hill, Anthony M.	2002-08-22
Dynamic, data-precharged, variable-entry-length, content addressable memory circuit architecture with multiple transistor threshold voltage extensions Grant 6,236,585 - Hill May 22, 2	2001-05-22
Family of logic circuits emploting mosfets of differing thershold voltages Grant 6,133,762 - Hill , et al. October 17, 2	2000-10-17

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