Hergenrother; John Michael

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hergenrother; John Michael.The latest application filed is for "high-z structure and method for co-alignment of mixed optical and electron beam lithographic fabrication levels".

Company Profile

0.11.8

Hergenrother; John Michael - Ridgefield CT
Hergenrother; John Michael - Short Hills NJ

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
High-Z structure and method for co-alignment of mixed optical and electron beam lithographic fabrication levels Grant 8,120,138 - Fried , et al. February 21, 2	2012-02-21
Method for co-alignment of mixed optical and electron beam lithographic fabrication levels Grant 7,696,057 - Fried , et al. April 13, 2	2010-04-13
Selective incorporation of charge for transistor channels Grant 7,687,863 - Hergenrother , et al. March 30, 2	2010-03-30
High-z Structure And Method For Co-alignment Of Mixed Optical And Electron Beam Lithographic Fabrication Levels App 20090212388 - Fried; David Michael ; et al.	2009-08-27
Trench structure and method for co-alignment of mixed optical and electron beam lithographic fabrication levels Grant 7,550,361 - Fried , et al. June 23, 2	2009-06-23
Selective Incorporation Of Charge For Transistor Channels App 20080217682 - Hergenrother; John Michael ; et al.	2008-09-11
Trench Structure And Method For Co-alignment Of Mixed Optical And Electron Beam Lithographic Fabrication Levels App 20080157404 - Fried; David Michael ; et al.	2008-07-03
High-z Structure And Method For Co-alignment Of Mixed Optical And Electron Beam Lithographic Fabrication Levels App 20080157260 - Fried; David Michael ; et al.	2008-07-03
Selective incorporation of charge for transistor channels Grant 7,374,998 - Hergenrother , et al. May 20, 2	2008-05-20
Selective incorporation of charge for transistor channels App 20070184619 - Hergenrother; John Michael ; et al.	2007-08-09
Architecture for circuit connection of a vertical transistor Grant 6,903,411 - Chyan , et al. June 7, 2	2005-06-07
Diffused MOS devices with strained silicon portions and methods for forming same Grant 6,828,628 - Hergenrother , et al. December 7, 2	2004-12-07
Method of making ultra thin body vertical replacement gate MOSFET Grant 6,821,851 - Hergenrother , et al. November 23, 2	2004-11-23
Diffused MOS devices with strained silicon portions and methods for forming same App 20040173846 - Hergenrother, John Michael ; et al.	2004-09-09
Method of making ultra thin body vertical replacement gate MOSFET App 20040152269 - Hergenrother, John Michael ; et al.	2004-08-05
CMOS integrated circuit having vertical transistors and a process for fabricating same Grant 6,653,181 - Hergenrother , et al. November 25, 2	2003-11-25
Ultra thin body vertical replacement gate MOSFET Grant 6,635,924 - Hergenrother , et al. October 21, 2	2003-10-21
CMOS integrated circuit having vertical transistors and a process for fabricating same App 20030057477 - Hergenrother, John Michael ; et al.	2003-03-27
Process for fabricating vertical transistors Grant 6,197,641 - Hergenrother , et al. March 6, 2	2001-03-06

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