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Patent applications and USPTO patent grants for Her; Tzong-Dar.The latest application filed is for "super low profile package with high efficiency of heat dissipation".
Patent | Date |
---|---|
Super low profile package with stacked dies Grant 6,731,015 - Wu , et al. May 4, 2 | 2004-05-04 |
Super low profile package with high efficiency of heat dissipation Grant 6,713,321 - Huang , et al. March 30, 2 | 2004-03-30 |
Structure of a multi chip module having stacked chips Grant 6,650,009 - Her , et al. November 18, 2 | 2003-11-18 |
Stacked-die package structure Grant 6,593,662 - Pu , et al. July 15, 2 | 2003-07-15 |
Super low profile package with high efficiency of heat dissipation App 20030092221 - Huang, Chien-Ping ;   et al. | 2003-05-15 |
Super low profile package with high efficiency of heat dissipation Grant 6,541,854 - Huang , et al. April 1, 2 | 2003-04-01 |
Heat dissipation ball grid array package Grant 6,525,942 - Huang , et al. February 25, 2 | 2003-02-25 |
Super low profile package with stacked dies App 20030025199 - Wu, Chi-Chuan ;   et al. | 2003-02-06 |
Structure of a multi chip module having stacked chips App 20020180023 - Her, Tzong-Dar ;   et al. | 2002-12-05 |
DCA memory module and a fabrication method thereof App 20020094602 - Her, Tzong-Dar ;   et al. | 2002-07-18 |
Super low profile package with high efficiency of heat dissipation App 20020066954 - Huang, Chien-Ping ;   et al. | 2002-06-06 |
Quad flat non-leaded package and leadframe for the same App 20020063315 - Huang, Chien-Ping ;   et al. | 2002-05-30 |
Heat dissipation ball grid array package App 20020034066 - Huang, Chien-Ping ;   et al. | 2002-03-21 |
Ball Grid Array Package And A Packaging Process For Same App 20020000656 - HUANG, CHIEN-PING ;   et al. | 2002-01-03 |
Tiny ball grid array package Grant 6,218,731 - Huang , et al. April 17, 2 | 2001-04-17 |
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