Henderson; Diana M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Henderson; Diana M..The latest application filed is for "write/read priority blocking scheme using parallel static address decode path".

Company Profile

4.12.10

Henderson; Diana M. - Poughkeepsie NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Cache array with reduced power consumption Grant 9,977,485 - Bunce , et al. May 22, 2	2018-05-22
Cache array with reduced power consumption Grant 9,971,394 - Bunce , et al. May 15, 2	2018-05-15
High frequency write through memory device Grant 9,355,692 - Bunce , et al. May 31, 2	2016-05-31
Write/read priority blocking scheme using parallel static address decode path Grant 9,281,024 - Bunce , et al. March 8, 2	2016-03-08
Write/read priority blocking scheme using parallel static address decode path Grant 9,281,025 - Bunce , et al. March 8, 2	2016-03-08
Write/read Priority Blocking Scheme Using Parallel Static Address Decode Path App 20150302902 - Bunce; Paul A. ; et al.	2015-10-22
Write/read Priority Blocking Scheme Using Parallel Static Address Decode Path App 20150302908 - Bunce; Paul A. ; et al.	2015-10-22
SRAM supply voltage global bitline precharge pulse Grant 9,070,433 - Bunce , et al. June 30, 2	2015-06-30
Cache Array With Reduced Power Consumption App 20150019890 - Bunce; Paul A. ; et al.	2015-01-15
Increasing memory operating frequency Grant 8,861,284 - Bunce , et al. October 14, 2	2014-10-14
Increasing Memory Operating Frequency App 20140078833 - Bunce; Paul A. ; et al.	2014-03-20
High Frequency Memory App 20140078835 - Bunce; Paul A. ; et al.	2014-03-20
Cache Array With Reduced Power Consumption App 20140082390 - Bunce; Paul A. ; et al.	2014-03-20
Port enable signal generation for gating a memory array device output Grant 8,599,642 - Bunce , et al. December 3, 2	2013-12-03
Jam latch for latching memory array output data Grant 8,351,278 - Bunce , et al. January 8, 2	2013-01-08
Split voltage level restore and evaluate clock signals for memory address decoding Grant 8,345,490 - Bunce , et al. January 1, 2	2013-01-01
Internal bypassing of memory array devices Grant 8,345,497 - Bunce , et al. January 1, 2	2013-01-01
Jam Latch For Latching Memory Array Output Data App 20110317496 - Bunce; Paul A. ; et al.	2011-12-29
Port Enable Signal Generation For Gating A Memory Array Device Output App 20110320851 - Bunce; Paul A. ; et al.	2011-12-29
Split Voltage Level Restore And Evaluate Clock Signals For Memory Address Decoding App 20110317499 - Bunce; Paul A. ; et al.	2011-12-29
Internal Bypassing Of Memory Array Devices App 20110317505 - Bunce; Paul A. ; et al.	2011-12-29

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