Hellner; Gerhard
Patent Applications and Registrations
Patent applications and USPTO patent grants for Hellner; Gerhard.The latest application filed is for "layout of interconnect lines in integrated circuits".
- Hellner; Gerhard - Schoenaich DE
- Hellner; Gerhard - Schonaich DE
- Hellner, Gerhard - Sindelfingen DE
| Patent | Date |
|---|---|
| Layout of interconnect lines in integrated circuits Grant 9,904,754 - Hellner , et al. February 27, 2 | 2018-02-27 |
| Layout of interconnect lines in integrated circuits Grant 9,898,571 - Hellner , et al. February 20, 2 | 2018-02-20 |
| Current-mode sense amplifier and reference current circuitry Grant 9,767,872 - Fritsch , et al. September 19, 2 | 2017-09-19 |
| Layout Of Interconnect Lines In Integrated Circuits App 20170228487 - Hellner; Gerhard ; et al. | 2017-08-10 |
| Layout Of Interconnect Lines In Integrated Circuits App 20170228489 - Hellner; Gerhard ; et al. | 2017-08-10 |
| Current-mode sense amplifier and reference current circuitry Grant 9,564,188 - Fritsch , et al. February 7, 2 | 2017-02-07 |
| Current-Mode Sense Amplifier and Reference Current Circuitry App 20160336049 - Fritsch; Alexander ; et al. | 2016-11-17 |
| Current-mode sense amplifier Grant 9,484,073 - Fritsch , et al. November 1, 2 | 2016-11-01 |
| Current-Mode Sense Amplifier and Reference Current Circuitry App 20160071555 - Fritsch; Alexander ; et al. | 2016-03-10 |
| Method and System for Modifying and Presenting Document Data App 20080016437 - Fenkes; Joachim ; et al. | 2008-01-17 |
| Content addressable memory App 20020075713 - Hellner, Gerhard ; et al. | 2002-06-20 |
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