Held; Ruediger
Patent Applications and Registrations
Patent applications and USPTO patent grants for Held; Ruediger.The latest application filed is for "fabricating a via".
- Held; Ruediger - Minneapolis MN
| Patent | Date |
|---|---|
| Fabricating A Via App 20150200355 - Erie; David G. ; et al. | 2015-07-16 |
| Forming a substantially planar upper surface at the outer edge of a semiconductor topography Grant 7,157,792 - Jayatilaka , et al. January 2, 2 | 2007-01-02 |
| Boltless carrier ring/carrier plate attachment assembly Grant 6,866,571 - Held March 15, 2 | 2005-03-15 |
| Wafer carrier, wafer carrier components, and CMP system for polishing a semiconductor topography Grant 6,786,809 - Held September 7, 2 | 2004-09-07 |
| Forming a substantially planar upper surface at the outer edge of a semiconductor topography Grant 6,780,771 - Jayatilaka , et al. August 24, 2 | 2004-08-24 |
| Method and system for spatial uniform polishing Grant 6,761,619 - Held July 13, 2 | 2004-07-13 |
| Method for polishing a semiconductor topography Grant 6,509,270 - Held January 21, 2 | 2003-01-21 |
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