Heaslip; Jay G.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Heaslip; Jay G..The latest application filed is for "promotion of erat cache entries".

Company Profile

5.10.8

Heaslip; Jay G. - Williston VT
Heaslip; Jay G. - Chittenden County VT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Promotion of ERAT cache entries Grant 11,221,957 - Blaner , et al. January 11, 2	2022-01-11
Speculative checkin of ERAT cache entries Grant 10,884,943 - Blaner , et al. January 5, 2	2021-01-05
Maintaining consistency between address translations in a data processing system Grant 10,599,569 - Blaner , et al.	2020-03-24
Speculative Checkin Of Erat Cache Entries App 20200073816 - Blaner; Bartholomew ; et al.	2020-03-05
Promotion Of Erat Cache Entries App 20200073817 - Blaner; Bartholomew ; et al.	2020-03-05
Techniques For Maintaining Consistency Between Address Translations In A Data Processing System App 20170371789 - BLANER; BARTHOLOMEW ; et al.	2017-12-28
Tracking memory accesses when invalidating effective address to real address translations Grant 9,740,629 - Blaner , et al. August 22, 2	2017-08-22
Tracking memory accesses when invalidating effective address to real address translations Grant 9,727,483 - Blaner , et al. August 8, 2	2017-08-08
Tracking Memory Accesses When Invalidating Effective Address To Real Address Translations App 20160179698 - Blaner; Bartholomew ; et al.	2016-06-23
Tracking Memory Accesses When Invalidating Effective Address To Real Address Translations App 20160179694 - Blaner; Bartholomew ; et al.	2016-06-23
Round robin priority selector Grant 8,918,558 - Heaslip December 23, 2	2014-12-23
Round Robin Priority Selector App 20130080743 - Heaslip; Jay G.	2013-03-28
Clock dithering system and method during frequency scaling Grant 7,106,110 - Canada , et al. September 12, 2	2006-09-12
Clock Dithering System And Method During Frequency Scaling App 20060022723 - Canada; Miles G. ; et al.	2006-02-02
Array-built-in-self-test (ABIST) for efficient, fast, bitmapping of large embedded arrays in manufacturing test Grant 6,643,807 - Heaslip , et al. November 4, 2	2003-11-04
Source identifier for result forwarding Grant 5,634,026 - Heaslip , et al. May 27, 1	1997-05-27

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.