Heaberlin; Douglas C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Heaberlin; Douglas C..The latest application filed is for "exhaustive diagnosis of bridging defects in an integrated circuit".

Company Profile

0.6.6

Heaberlin; Douglas C. - Underhill VT

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Exhaustive diagnosis of bridging defects in an integrated circuit including multiple nodes using test vectors and IDDQ measurements Grant 7,352,170 - Heaberlin April 1, 2	2008-04-01
Exhaustive Diagnosis Of Bridging Defects In An Integrated Circuit App 20070296443 - Heaberlin; Douglas C.	2007-12-27
Method for locating I.sub.DDQ defects using multiple controlled collapse chip connections current measurement on an automatic tester Grant 7,064,570 - Buffet , et al. June 20, 2	2006-06-20
Internal cache for on chip test data storage Grant 6,901,542 - Bartenstein , et al. May 31, 2	2005-05-31
Diagnosis of combinational logic circuit failures Grant 6,721,914 - Bartenstein , et al. April 13, 2	2004-04-13
Method for locating IDDQ defects using multiple controlled collapse chip connections current measurement on an automatic tester App 20040061519 - Buffet, Patrick H. ; et al.	2004-04-01
Method for locating IDDQ defects using multiple controlled collapse chip connections current measurement on an automatic tester Grant 6,677,774 - Buffet , et al. January 13, 2	2004-01-13
Incremental fault dictionary Grant 6,675,323 - Bartenstein , et al. January 6, 2	2004-01-06
Incremental fault dictionary App 20030046608 - Bartenstein, Thomas W. ; et al.	2003-03-06
Internal cache for on chip test data storage App 20030033566 - Bartenstein, Thomas W. ; et al.	2003-02-13
Method for locating IDDQ defects using multiple controlled collapse chip connections current measurement on an automatic tester App 20020196042 - Buffet, Patrick H. ; et al.	2002-12-26
Diagnosis of combinational logic circuit failures App 20020147952 - Bartenstein, Thomas W. ; et al.	2002-10-10

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