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Bus control system
Grant 7,340,552 - Kondo , et al. March 4, 2 | 2008-03-04 |
Bus control system
App 20070106832 - Kondo; Nobukazu ; et al. | 2007-05-10 |
Bus control system
Grant 7,177,970 - Kondo , et al. February 13, 2 | 2007-02-13 |
Computer system having a plurality of computers each providing a shared storage access processing mechanism for controlling local/remote access to shared storage devices
Grant 6,970,912 - Murayama , et al. November 29, 2 | 2005-11-29 |
Multi-processor system and its network
Grant 6,728,258 - Okada , et al. April 27, 2 | 2004-04-27 |
Computer System Having A Plurality Of Computers Each Providing A Shared Storage Access Processing Mechanism For Controlling Local/remote Access To Shared Storage Devices
App 20030126420 - MURAYAMA, HIDEKI ; et al. | 2003-07-03 |
Bus control system
App 20030070020 - Kondo, Nobukazu ; et al. | 2003-04-10 |
Method and apparatus for controlling resource
Grant 6,477,560 - Murayama , et al. November 5, 2 | 2002-11-05 |
Bus control system
App 20020032817 - Kondo, Nobukazu ; et al. | 2002-03-14 |
Apparatus for interconnecting logic boards
Grant 6,335,867 - Ishibashi , et al. January 1, 2 | 2002-01-01 |
Information processing system
App 20010023462 - Kondo, Nobukazu ; et al. | 2001-09-20 |
Apparatus for interconnecting logic boards
Grant 6,163,464 - Ishibashi , et al. December 19, 2 | 2000-12-19 |
Bus control system
Grant 6,128,688 - Kondo , et al. October 3, 2 | 2000-10-03 |
Semiconductor integrated circuit system having function of automatically adjusting output resistance value
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Multi-processor system and its network
Grant 6,011,791 - Okada , et al. January 4, 2 | 2000-01-04 |
Video storage and delivery apparatus and system
Grant 6,005,599 - Asai , et al. December 21, 1 | 1999-12-21 |
Bus control system incorporating the coupling of two split-transaction busses of different hierarchy
Grant 5,941,973 - Kondo , et al. August 24, 1 | 1999-08-24 |
Computer system having a plurality of computers each providing a shared storage access processing mechanism for controlling local/remote access to shared storage devices
Grant 5,935,205 - Murayama , et al. August 10, 1 | 1999-08-10 |
Simultaneous bidirectional transmission circuit
Grant 5,872,471 - Ishibashi , et al. February 16, 1 | 1999-02-16 |
Data transfer system and method
Grant 5,870,594 - Doi , et al. February 9, 1 | 1999-02-09 |
Method and system for synchronizing data having skew
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Data transfer apparatus fetching reception data at maximum margin of timing
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Data transfer system and method including tuning of a sampling clock used for latching data
Grant 5,737,589 - Doi , et al. April 7, 1 | 1998-04-07 |
Input/output control method and data processor
Grant 5,678,062 - Okada , et al. October 14, 1 | 1997-10-14 |
Bus control system
Grant 5,671,371 - Kondo , et al. September 23, 1 | 1997-09-23 |
Distributed shared data management system for controlling structured shared data and for serializing access to shared data
Grant 5,649,102 - Yamauchi , et al. July 15, 1 | 1997-07-15 |
Method and apparatus for synchronizing parallel data transfer
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Method of communication between network computers by dividing packet data into parts for transfer to respective regions
Grant 5,617,424 - Murayama , et al. April 1, 1 | 1997-04-01 |
Interconnection network and crossbar switch for the same
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System for parallel string search with a function-directed parallel collation of a first partition of each string followed by matching of second partitions
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Interconnection network and crossbar switch for the same
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Information processing system and method for processing document by using structured keywords
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Semiconductor associative memory device with current sensing
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Semiconductor integrated circuit apparatus and method for designing the same
Grant 5,223,733 - Doi , et al. June 29, 1 | 1993-06-29 |
Information processing system
Grant 5,165,010 - Masuda , et al. November 17, 1 | 1992-11-17 |
Field effect transistor
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High speed clock distribution system
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Semiconductor integrated circuit device
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Pre-charge circuit with a bipolar transistor
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Data transfer network suitable for use in a parallel computer
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BICMOS output interface circuit for level-shifting ECL to CMOS
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