loadpatents
name:-0.0065250396728516
name:-0.016234159469604
name:-0.00046396255493164
Hata; William Y. Patent Filings

Hata; William Y.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hata; William Y..The latest application filed is for "heat pipe in overmolded flip chip package".

Company Profile
0.15.5
  • Hata; William Y. - Saratoga CA
  • Hata; William Y. - Milpitas CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Bond and probe pad distribution
Grant 9,267,985 - Hata February 23, 2
2016-02-23
Heat pipe in overmolded flip chip package
Grant 9,202,772 - Hata December 1, 2
2015-12-01
Heat Spreading In Molded Semiconductor Packages
App 20140239483 - Hata; William Y.
2014-08-28
Heat Pipe In Overmolded Flip Chip Package
App 20140239487 - Hata; William Y.
2014-08-28
Integrated circuit package architecture
Grant 8,772,085 - Hata July 8, 2
2014-07-08
Integrated Circuit Package Architecture
App 20120159779 - Hata; William Y.
2012-06-28
Integrated circuit package architecture
Grant 8,148,813 - Hata April 3, 2
2012-04-03
Reticle for wafer test structure areas
Grant 8,003,984 - Hata August 23, 2
2011-08-23
Package Architecture
App 20110024889 - Hata; William Y.
2011-02-03
Bond And Probe Pad Distribution
App 20110025359 - Hata; William Y.
2011-02-03
Reticle for layout modification of wafer test structure areas
Grant 7,316,935 - Hata January 8, 2
2008-01-08
Method and apparatus for monitoring yield of integrated circuits
Grant 7,212,032 - Dastidar , et al. May 1, 2
2007-05-01
Method and apparatus for operating a burn-in board to achieve lower equilibrium temperature and to minimize thermal runaway
Grant 6,982,566 - Alam , et al. January 3, 2
2006-01-03
Techniques for reticle layout to modify wafer test structure area
Grant 6,967,111 - Hata November 22, 2
2005-11-22
Underfill for maximum flip chip package reliability
Grant 6,956,165 - Hata , et al. October 18, 2
2005-10-18
Catalytic acceleration and electrical bias control of CMP processing
Grant 5,948,697 - Hata September 7, 1
1999-09-07
Method of producing stepped wall interconnects and gates
Grant 5,880,015 - Hata March 9, 1
1999-03-09
Method of producing submicron contacts with unique etched slopes
Grant 5,366,848 - Thane , et al. November 22, 1
1994-11-22

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