Hartwich; Jessica

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hartwich; Jessica.The latest application filed is for "device for forming a reduced chamber space, and method for positioning multilayer bodies".

Company Profile

0.9.17

Hartwich; Jessica - Sauerlach DE
Hartwich; Jessica - Neubiberg DE
Hartwich; Jessica - Dresden DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Device for forming a reduced chamber space, and method for positioning multilayer bodies Grant 9,352,431 - Palm , et al. May 31, 2	2016-05-31
Device For Forming A Reduced Chamber Space, And Method For Positioning Multilayer Bodies App 20130067723 - Palm; Joerg ; et al.	2013-03-21
Device And Method For Substrate Processing App 20130059431 - Hartwich; Jessica ; et al.	2013-03-07
Integrated circuit arrangement with capacitor and fabrication method Grant 8,124,475 - Brederlow , et al. February 28, 2	2012-02-28
Method of manufacturing integrated circuits including a FET with a gate spacer and a fin Grant 7,863,136 - Goldbach , et al. January 4, 2	2011-01-04
Integrated circuit arrangement with capacitor and fabrication method Grant 7,820,505 - Brederlow , et al. October 26, 2	2010-10-26
Method Of Manufacturing Integrated Circuits Including A Fet With A Gate Spacer App 20100078711 - Goldbach; Matthias ; et al.	2010-04-01
Integrated circuit and method of manufacturing an integrated circuit Grant 7,622,354 - Dreeskornfeld , et al. November 24, 2	2009-11-24
Integrated Circuit Arrangement With Capacitor And Fabrication Method App 20090184355 - Brederlow; Ralf ; et al.	2009-07-23
Integrated circuit and method of forming an integrated circuit App 20090086523 - Hartwich; Jessica ; et al.	2009-04-02
Integrated Circuit And Method Of Manufacturing An Integrated Circuit App 20090057778 - Dreeskornfeld; Lars ; et al.	2009-03-05
Manufacturing method for forming a recessed channel transistor, method for forming a corresponding integrated semiconductor memory device and corresponding self-aligned mask structure App 20080299722 - Hartwich; Jessica ; et al.	2008-12-04
Transistor, Integrated Circuit And Method Of Forming An Integrated Circuit App 20080296674 - Graham; Andrew ; et al.	2008-12-04
Integrated Circuit And Method Of Forming An Integrated Circuit App 20080283910 - Dreeskornfeld; Lars ; et al.	2008-11-20
Field Effect Transistor Arrangement App 20080197384 - Hartwich; Jessica ; et al.	2008-08-21
Integrated Circuit Arrangement With Capacitor And Fabrication Method App 20080038888 - Brederlow; Ralf ; et al.	2008-02-14
Integrated circuit arrangement with capacitor Grant 7,291,877 - Brederlow , et al. November 6, 2	2007-11-06
Molecular electronics arrangement and method for producing a molecular electronics arrangement Grant 7,189,988 - Hartwich , et al. March 13, 2	2007-03-13
Integrated circuit arrangement having capacitors and having planar transistors and fabrication method Grant 7,173,302 - Brederlow , et al. February 6, 2	2007-02-06
Integrated circuit arrangement comprising capacitors and preferably planar transistors, and production method App 20060022302 - Brederlow; Ralf ; et al.	2006-02-02
Integrated circuit arrangement comprising a capacitor, and production method App 20060003526 - Brederlow; Ralf ; et al.	2006-01-05
Fin field effect transistor memory cell App 20060001058 - Dreeskornfeld; Lars ; et al.	2006-01-05
Molecular electronics arrangement and method for producing a molecular electronics arrangement App 20040219731 - Hartwich, Jessica ; et al.	2004-11-04

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