Hartman Jeffrey D

USPTO Trademark & Patent Filings

Trademark applications and grants for Hartman Jeffrey D. Hartman Jeffrey D has 1 trademark applications. The latest application filed is for "a symbol or image mark"

Company Profile

HARTMAN, JEFFREY D.
d jeffrey hartman
Hartman; Jeffrey D. - Severn MD

Trademarks Patents

Patent Applications

Patent Application	Date
SUPERLATTICE CRENELATED GATE FIELD EFFECT TRANSISTOR 20140264273 - 13/802747 Howell; Robert S. ; et al.	2014-09-18
Transplanted epitaxial regrowth for fabricating large area substrates for electronic devices 20080157090 - 11/646347 Thomson; Darren Brent ; et al.	2008-07-03
Novel thinning process for 3 - dimensional integration via wafer bonding 20060286767 - 11/154641 Clarke; Rowland C. ; et al.	2006-12-21
Novel method for integrating silicon CMOS and AlGaN/GaN wideband amplifiers on engineered substrates 20060284247 - 11/326443 Augustine; Godfrey ; et al.	2006-12-21
Multilayered substrate obtained via wafer bonding for power applications 20060284167 - 11/326439 Augustine; Godfrey ; et al.	2006-12-21
Superlattice crenelated gate field effect transistor 9,202,906 - 13/802,747 Howell , et al. December 1, 2	2015-12-01
Superlattice crenelated gate field effect transistor 9,202,906 - 13/802,747 Howell , et al. December 1, 2	2015-12-01
Method for integrating silicon CMOS and AlGaN/GaN wideband amplifiers on engineered substrates 7,420,226 - 11/326,443 Augustine , et al. September 2, 2	2008-09-02
Method of thinning a semiconductor structure 7,253,083 - 11/154,641 Clarke , et al. August 7, 2	2007-08-07

Patent Grants & Applications

Trademark Applications

Mark Image Registration \| Serial	Trademark Application Date
"Symbol/Image" 1590322 73810801	Symbol/Image 1989-07-05

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