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Patent applications and USPTO patent grants for Hart; Cornelis M..The latest application filed is for "arrangement for transient-current testing of a digital electronic cmos circuit".
Patent | Date |
---|---|
Arrangement for transient-current testing of a digital electronic CMOS circuit Grant 6,414,511 - Janssen , et al. July 2, 2 | 2002-07-02 |
Method of providing a vertical interconnect between thin film microelectronic devices Grant 6,400,024 - Drury , et al. June 4, 2 | 2002-06-04 |
Identification transponder Grant 6,133,835 - De Leeuw , et al. October 17, 2 | 2000-10-17 |
Semiconductor memory having thin film field effect selection transistors Grant 5,550,773 - Woerlee , et al. August 27, 1 | 1996-08-27 |
Integrated injection logic circuits Grant 4,714,842 - Hart , et al. * December 22, 1 | 1987-12-22 |
Memory cell arrangement for a static memory Grant 4,393,471 - Hart , et al. July 12, 1 | 1983-07-12 |
Integrated injection logic circuits Grant 4,286,177 - Hart , et al. August 25, 1 | 1981-08-25 |
Semiconductor device Grant 4,183,037 - Le Can , et al. January 8, 1 | 1980-01-08 |
Method of manufacturing a semiconductor device and device manufactured by using the method Grant 4,148,054 - Hart , et al. April 3, 1 | 1979-04-03 |
Multi-stage integrated injection logic circuit Grant 4,137,465 - Hart January 30, 1 | 1979-01-30 |
Junction field effect transistor random access memory Grant 4,126,899 - Lohstroh , et al. November 21, 1 | 1978-11-21 |
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