Harrow; Scott Edward
Patent Applications and Registrations
Patent applications and USPTO patent grants for Harrow; Scott Edward.The latest application filed is for "multiple entry wavetable address cache to reduce accesses over a pci bus".
- Harrow; Scott Edward - Scottsdale AZ
| Patent | Date |
|---|---|
| Multiple entry wavetable address cache to reduce accesses over a PCI bus Grant 6,047,365 - Chambers , et al. April 4, 2 | 2000-04-04 |
| Method and system for an extensible on silicon bus supporting multiple functional blocks Grant 5,915,103 - Chambers , et al. June 22, 1 | 1999-06-22 |
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