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Storing a processing state based on confidence in a predicted branch outcome and a number of recent state changes
Grant 11,204,773 - Burky , et al. December 21, 2 | 2021-12-21 |
Executing Instructions Based On Status
App 20210064377 - ABHISHEK RAJA; ; et al. | 2021-03-04 |
Cache Storage Techniques
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Data processing
Grant 10,310,862 - McDonald , et al. | 2019-06-04 |
Data Processing
App 20180275994 - McDONALD; Robert Greg ; et al. | 2018-09-27 |
Buffer store with a main store and and auxiliary store
Grant 9,946,545 - Hardage , et al. April 17, 2 | 2018-04-17 |
Size mis-match hazard detection
Grant 9,081,581 - Hardage , et al. July 14, 2 | 2015-07-14 |
Register Mapping With Multiple Instruction Sets
App 20150082007 - HARRIS; Glen Andrew ; et al. | 2015-03-19 |
Setting zero bits in architectural register for storing destination operand of smaller size based on corresponding zero flag attached to renamed physical register
Grant 8,972,701 - Hardage , et al. March 3, 2 | 2015-03-03 |
Mapping same logical register specifier for different instruction sets with divergent association to architectural register file using common address format
Grant 8,914,615 - Harris , et al. December 16, 2 | 2014-12-16 |
Register Mapping With Multiple Instruction Sets
App 20130145126 - Harris; Glen Andrew ; et al. | 2013-06-06 |
Zero Value Prefixes For Operands Of Differing Bit-widths
App 20130145127 - Hardage; James Nolan ; et al. | 2013-06-06 |
Renaming wide register source operand with plural short register source operands for select instructions to detect dependency fast with existing mechanism
Grant 8,386,754 - Blasco Allue , et al. February 26, 2 | 2013-02-26 |
Buffer store with a main store and an auxiliary store
App 20120124301 - Hardage; James Nolan ; et al. | 2012-05-17 |
Decoding conditional program instructions
App 20120124346 - Hardage; James Nolan ; et al. | 2012-05-17 |
Size mis-match hazard detection
App 20120124337 - Hardage; James Nolan ; et al. | 2012-05-17 |
Multiple instruction set decoding
Grant 7,958,335 - Blasco Allue , et al. June 7, 2 | 2011-06-07 |
Remapping source Registers to aid instruction scheduling within a processor
App 20100332805 - Blasco Allue; Conrado ; et al. | 2010-12-30 |
Result bypassing to override a data hazard within a superscalar processor
Grant 7,774,582 - Williamson , et al. August 10, 2 | 2010-08-10 |
Preventing loss of traced information in a data processing apparatus
Grant 7,496,899 - Hill , et al. February 24, 2 | 2009-02-24 |
Decoding predication instructions within a superscaler data processing system
Grant 7,234,043 - Blasco Allue , et al. June 19, 2 | 2007-06-19 |
Preventing loss of traced information in a data processing apparatus
App 20070050600 - Hill; Stephen John ; et al. | 2007-03-01 |
Performance of a data processing apparatus
App 20070043930 - Hill; Stephen John ; et al. | 2007-02-22 |
Multiple instruction set decoding
App 20070033383 - Blasco Allue; Conrado ; et al. | 2007-02-08 |
Instruction queues in pipelined processors
App 20070028078 - Harris; Glen Andrew ; et al. | 2007-02-01 |
Instruction issue control within a superscalar processor
App 20060271768 - Williamson; David James ; et al. | 2006-11-30 |
Performance of a data processing apparatus
App 20060218124 - Williamson; Barry Duane ; et al. | 2006-09-28 |
Decoding predication instructions within a superscalar data processing system
App 20060200653 - Blasco Allue; Conrado ; et al. | 2006-09-07 |
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