Harnay; Didier

Patent Applications and Registrations

Patent applications and USPTO patent grants for Harnay; Didier.The latest application filed is for "method and apparatus for avoiding spurs in chip".

Company Profile

0.7.5

Harnay; Didier - Cesson Sevigne FR
Harnay; Didier - Valbonne FR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method and apparatus for avoiding spurs in chip Grant 9,455,729 - Harnay , et al. September 27, 2	2016-09-27
Increased throughput in radio-frequency communications Grant 9,439,224 - Harnay , et al. September 6, 2	2016-09-06
Optimizing block reception for simultaneous use of at least two SIM cards Grant 9,078,265 - Harnay July 7, 2	2015-07-07
Method And Apparatus For Avoiding Spurs In Chip App 20150077165 - Harnay; Didier ; et al.	2015-03-19
Optimizing Block Reception For Simultaneous Use Of At Least Two Sim Cards App 20130203426 - Harnay; Didier	2013-08-08
Increased Throughput In Radio-frequency Communications App 20120082143 - Harnay; Didier ; et al.	2012-04-05
Method and apparatus for acquiring a frequency burst in a radio communication device Grant 7,864,891 - Mondet , et al. January 4, 2	2011-01-04
Method And Apparatus For Acquiring A Frequency Burst In A Radio Communication Device App 20070140388 - Mondet; Mickael ; et al.	2007-06-21
Integrated circuit including patching circuitry to bypass portions of an internally flawed read only memory and a method therefore Grant 6,158,018 - Bernasconi , et al. December 5, 2	2000-12-05

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