Hariharan; Ganesh

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hariharan; Ganesh.The latest application filed is for "die singulation and stacked device structures".

Company Profile

1.7.1

Hariharan; Ganesh - Milpitas CA
Hariharan; Ganesh - Santa Clara CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Die singulation and stacked device structures Grant 11,075,117 - Hariharan , et al. July 27, 2	2021-07-27
Stacked silicon package assembly having enhanced stiffener Grant 10,840,192 - Zohni , et al. November 17, 2	2020-11-17
Die Singulation And Stacked Device Structures App 20190267287 - Hariharan; Ganesh ; et al.	2019-08-29
Method and apparatus for testing interposer dies prior to assembly Grant 9,989,572 - Chaware , et al. June 5, 2	2018-06-05
Heterogeneous integration of integrated circuit device and companion device Grant 9,865,567 - Chaware , et al. January 9, 2	2018-01-09
Method for providing charge protection to one or more dies during formation of a stacked silicon device Grant 9,385,106 - Chaware , et al. July 5, 2	2016-07-05
Integrated circuit package testing Grant 9,341,668 - Hariharan , et al. May 17, 2	2016-05-17
Method for removing bumps from incomplete and defective interposer dies for stacked silicon interconnect technology (SSIT) devices Grant 8,900,987 - Singh , et al. December 2, 2	2014-12-02

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