Hardee; Kim C.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hardee; Kim C..The latest application filed is for "calibration circuit for on-chip drive and on-die termination".

Company Profile

0.51.24

Hardee; Kim C. - Colorado Springs CO
Hardee; Kim C. - Colorodo Springs CO
Hardee; Kim C. - Austin TX
Hardee; Kim C. - Manitou Springs CO

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Calibration circuit for on-chip drive and on-die termination Grant 10,103,731 - Hardee October 16, 2	2018-10-16
Calibration Circuit For On-chip Drive And On-die Termination App 20180048310 - Hardee; Kim C.	2018-02-15
Calibration circuit for on-chip drive and on-die termination Grant 9,780,785 - Hardee October 3, 2	2017-10-03
Calibration Circuit For On-chip Drive And On-die Termination App 20170179953 - Hardee; Kim C.	2017-06-22
Dual bit line precharge architecture and method for low power dynamic random access memory (DRAM) integrated circuit devices and devices incorporating embedded DRAM Grant 8,339,882 - Parris , et al. December 25, 2	2012-12-25
Dual Bit Line Precharge Architecture And Method For Low Power Dynamic Random Access Memory (dram) Integrated Circuit Devices And Devices Incorporating Embedded Dram App 20120008444 - Parris; Michael C. ; et al.	2012-01-12
Dual Bit Line Precharge Architecture And Method For Low Power Dynamic Random Access Memory (dram) Integrated Circuit Devices And Devices Incorporating Embedded Dram App 20120008445 - Parris; Michael C. ; et al.	2012-01-12
Short-circuit charge-sharing technique for integrated circuit devices Grant 7,649,406 - Parris , et al. January 19, 2	2010-01-19
Switched capacitor charge sharing technique for integrated circuit devices enabling signal generation of disparate selected signal values Grant 7,609,570 - Parris , et al. October 27, 2	2009-10-27
Optimized charge sharing for data bus skew applications Grant 7,606,093 - Parris , et al. October 20, 2	2009-10-20
Static Random Access Memory (sram) Compatible, High Availability Memory Array And Method Employing Synchronous Dynamic Random Access Memory (dram) In Conjunction With A Data Cache And Separate Read And Write Registers And Tag Blocks App 20090106488 - Butler; Douglas Blaine ; et al.	2009-04-23
Short-circuit Charge-sharing Technique For Integrated Circuit Devices App 20090072879 - Parris; Michael C. ; et al.	2009-03-19
Early Write With Data Masking Technique For Integrated Circuit Dynamic Random Access Memory (dram) Devices And Those Incorporating Embedded Dram App 20090073786 - Parris; Michael C. ; et al.	2009-03-19
Static random access memory (SRAM) compatible, high availability memory array and method employing synchronous dynamic random access memory (DRAM) in conjunction with a data cache and separate read and write registers and tag blocks Grant 7,506,100 - Butler , et al. March 17, 2	2009-03-17
Data bus charge-sharing technique for integrated circuit devices Grant 7,463,054 - Parris , et al. December 9, 2	2008-12-09
Switched Capacitor Charge Sharing Technique For Integrated Circuit Devices Enabling Signal Generation Of Disparate Selected Signal Values App 20080175074 - Parris; Michael C. ; et al.	2008-07-24
Optimized Charge Sharing For Data Bus Skew Applications App 20080174340 - Parris; Michael C. ; et al.	2008-07-24
Power-gating system and method for integrated circuit devices Grant 7,372,765 - Hardee May 13, 2	2008-05-13
High speed power-gating technique for integrated circuit devices incorporating a sleep mode of operation Grant 7,359,277 - Hardee April 15, 2	2008-04-15
Sense amplifier power-gating technique for integrated circuit memory devices and those devices incorporating embedded dynamic random access memory (DRAM) Grant 7,248,522 - Hardee July 24, 2	2007-07-24
Powergating method and apparatus Grant 7,180,363 - Parris , et al. February 20, 2	2007-02-20
Clock signal initiated precharge technique for active memory subarrays in dynamic random access memory (DRAM) devices and other integrated circuit devices incorporating embedded DRAM Grant 7,154,795 - Parris , et al. December 26, 2	2006-12-26
Self-addressed subarray precharge Grant 7,151,711 - Hardee December 19, 2	2006-12-19
Voltage down converter with switched hysteresis Grant RE39,274 - Hardee September 12, 2	2006-09-12
Static random access memory (SRAM) compatible, high availability memory array and method employing synchronous dynamic random access memory (DRAM) in conjunction with a data cache and separate read and write registers and tag blocks App 20060190676 - Butler; Douglas Blaine ; et al.	2006-08-24
Self-addressed subarray precharge App 20060187727 - Hardee; Kim C.	2006-08-24
Powergate control using boosted and negative voltages Grant 7,053,692 - Parris , et al. May 30, 2	2006-05-30
Powergating method and apparatus App 20060022742 - Parris; Michael C. ; et al.	2006-02-02
Clock signal initiated precharge technique for active memory subarrays in dynamic random access memory (DRAM) devices and other integrated circuit devices incorporating embedded DRAM App 20060023530 - Parris; Michael C. ; et al.	2006-02-02
Column read amplifier power-gating technique for integrated circuit memory devices and those devices incorporating embedded dynamic random access memory (DRAM) Grant 6,990,029 - Hardee January 24, 2	2006-01-24
Power-gating system and method for integrated circuit devices App 20050270074 - Hardee, Kim C.	2005-12-08
Non-contiguous masked refresh for an integrated circuit memory Grant 6,912,168 - Parris , et al. June 28, 2	2005-06-28
Integrated circuit transistor body bias regulation circuit and method for low voltage applications App 20050052219 - Butler, Douglas Blaine ; et al.	2005-03-10
Sense amplifier power-gating technique for integrated circuit memory devices and those devices incorporating embedded dynamic random access memory (DRAM) App 20050052931 - Hardee, Kim C.	2005-03-10
Column read amplifier power-gating technique for integrated circuit memory devices and those devices incorporating embedded dynamic random access memory (DRAM) App 20050052917 - Hardee, Kim C.	2005-03-10
High speed power-gating technique for integrated circuit devices incorporating a sleep mode of operation App 20050052936 - Hardee, Kim C.	2005-03-10
Non-contiguous masked refresh for an integrated circuit memory App 20040184334 - Parris, Michael C. ; et al.	2004-09-23
Bitline reference voltage circuit Grant 6,788,590 - Parris , et al. September 7, 2	2004-09-07
Bitline Reference Voltage Circuit App 20040141360 - Parris, Michael C. ; et al.	2004-07-22
Powergate control using boosted and negative voltages App 20040119529 - Parris, Michael C. ; et al.	2004-06-24
Optimized read data amplifier and method for operating the same in conjunction with integrated circuit devices incorporating memory arrays Grant 6,738,302 - Parris , et al. May 18, 2	2004-05-18
High voltage transistor protection technique and switching circuit for integrated circuit devices utilizing multiple power supply voltages Grant 6,731,156 - Parris , et al. May 4, 2	2004-05-04
Data path decoding technique for an embedded memory array Grant 6,625,069 - Parris , et al. September 23, 2	2003-09-23
Data path decoding technique for an embedded memory array Grant 6,625,066 - Parris , et al. September 23, 2	2003-09-23
Look-ahead refresh for an integrated circuit memory Grant 6,625,078 - Jones, Jr. , et al. September 23, 2	2003-09-23
Data Path Decoding Technique For An Embedded Memory Array App 20030174542 - Parris, Michael C. ; et al.	2003-09-18
Data Path Decoding Technique For An Embedded Memory Array App 20030174546 - Parris, Michael C. ; et al.	2003-09-18
Look-ahead Refresh For An Integrated Circuit Memory App 20030161207 - Jones, Oscar Frederick JR. ; et al.	2003-08-28
Automatic delay technique for early read and write operations in synchronous dynamic random access memories Grant 6,608,797 - Parris , et al. August 19, 2	2003-08-19
Shared sense amplifier driver technique for dynamic random access memories exhibiting improved write recovery time Grant 6,515,926 - Parris , et al. February 4, 2	2003-02-04
Voltage down converter with switched hysteresis Grant 6,300,810 - Hardee October 9, 2	2001-10-09
Reference voltage shifter Grant 6,285,242 - Hardee September 4, 2	2001-09-04
Method of reading and writing data using local data read and local data write circuits Grant 6,275,432 - Hardee August 14, 2	2001-08-14
Sense amplifier with local write drivers Grant 6,088,270 - Hardee July 11, 2	2000-07-11
Circuit and method for accessing memory cells of a memory device Grant 5,680,362 - Parris , et al. October 21, 1	1997-10-21
Wide range power supply for integrated circuits Grant 5,570,005 - Hardee , et al. October 29, 1	1996-10-29
Wide range power supply for integrated circuits Grant 5,483,152 - Hardee , et al. January 9, 1	1996-01-09
Low power VCC and temperature independent oscillator Grant 5,461,590 - Cordoba , et al. October 24, 1	1995-10-24
Oscillatorless substrate bias generator Grant 5,347,172 - Cordoba , et al. September 13, 1	1994-09-13
Efficient negative charge pump Grant 5,347,171 - Cordoba , et al. September 13, 1	1994-09-13
Low power V.sub.cc and temperature independent oscillator Grant 5,345,195 - Cordoba , et al. September 6, 1	1994-09-06
High voltage generator having a self-timed clock circuit and charge pump, and a method therefor Grant 5,337,284 - Cordoba , et al. August 9, 1	1994-08-09
Self-timed bootstrap decoder Grant 5,327,026 - Hardee , et al. July 5, 1	1994-07-05
Low-to-high voltage translator with latch-up immunity Grant 5,321,324 - Hardee , et al. June 14, 1	1994-06-14
Temperature compensated voltage reference for low and wide voltage ranges Grant 5,315,230 - Cordoba , et al. May 24, 1	1994-05-24
Dynamic random access memory Grant 5,077,693 - Hardee , et al. December 31, 1	1991-12-31
Bit line and column circuitry used in a semiconductor memory Grant 4,791,613 - Hardee December 13, 1	1988-12-13
Multistage decoding Grant 4,660,178 - Hardee , et al. April 21, 1	1987-04-21
Bootstrap driver for a static RAM Grant 4,570,244 - Sud , et al. February 11, 1	1986-02-11
Bootstrap driver circuits for an MOS memory Grant 4,500,799 - Sud , et al. February 19, 1	1985-02-19
Bit line precharging and equilibrating circuit Grant 4,494,221 - Hardee , et al. January 15, 1	1985-01-15
Redundancy system for high speed, wide-word semiconductor memories Grant 4,459,685 - Sud , et al. July 10, 1	1984-07-10
Asynchronously equillibrated and pre-charged static ram Grant 4,355,377 - Sud , et al. October 19, 1	1982-10-19
Redundancy scheme for an MOS memory Grant 4,346,459 - Sud , et al. August 24, 1	1982-08-24
Substrate bias generator Grant 4,336,466 - Sud , et al. June 22, 1	1982-06-22

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