Hapke; Friedrich

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hapke; Friedrich.The latest application filed is for "cell internal defect diagnosis".

Company Profile

0.22.20

Hapke; Friedrich - Winsen DE
Hapke; Friedrich - US
Hapke; Friedrich - Winsen/Luhe DE
Hapke; Friedrich - Hamburg DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Cell Internal Defect Diagnosis App 20150234978 - Tang; Huaxing ; et al.	2015-08-20
Cell-aware fault model generation for delay faults Grant 8,990,760 - Hapke , et al. March 24, 2	2015-03-24
Multi-targeting boolean satisfiability-based test pattern generation Grant 8,689,069 - Krenz-Baath , et al. April 1, 2	2014-04-01
High speed clock control Grant 8,448,008 - Hapke , et al. May 21, 2	2013-05-21
On-chip logic to log failures during production testing and enable debugging for failure diagnosis Grant 8,423,845 - Hapke , et al. April 16, 2	2013-04-16
Cell-Aware Fault Model Generation For Delay Faults App 20130054161 - Hapke; Friedrich ; et al.	2013-02-28
Multi-targeting Boolean Satisfiability-based Test Pattern Generation App 20120317454 - KRENZ-BAATH; RENE ; et al.	2012-12-13
Testable integrated circuit and test data generation method Grant 8,250,420 - Hapke , et al. August 21, 2	2012-08-21
Deterministic logic built-in self-test stimuli generation Grant 8,112,686 - Hapke , et al. February 7, 2	2012-02-07
On-chip logic to support compressed X-masking for BIST Grant 8,103,925 - Hapke , et al. January 24, 2	2012-01-24
On-Chip Logic To Log Failures During Production Testing And Enable Debugging For Failure Diagnosis App 20110047425 - Hapke; Friedrich ; et al.	2011-02-24
Circuit arrangement and method of testing an application circuit provided in said circuit arrangement Grant 7,870,453 - Wittke , et al. January 11, 2	2011-01-11
On-Chip Logic To Support Compressed X-Masking For BIST App 20100299567 - Hapke; Friedrich ; et al.	2010-11-25
Deterministic Logic Built-In Self-Test Stimuli Generation App 20100275075 - Hapke; Friedrich ; et al.	2010-10-28
On-Chip Logic To Support In-Field Or Post-Tape-Out X-Masking In BIST Designs App 20100253381 - Hapke; Friedrich ; et al.	2010-10-07
High Speed Clock Control App 20100251045 - HAPKE; Friedrich ; et al.	2010-09-30
Cell-Aware Fault Model Creation And Pattern Generation App 20100229061 - HAPKE; Friedrich ; et al.	2010-09-09
Testable Integrated Circuit And Test Data Generation Method App 20100117658 - Hapke; Friedrich ; et al.	2010-05-13
Circuit Arrangement And Method Of Testing And/or Diagnosing The Same App 20090013230 - Glowatz; Andreas ; et al.	2009-01-08
Circuit Arrangement and Method of Testing an Application Circuit Provided in Said Circuit Arrangement App 20080195907 - Wittke; Michael ; et al.	2008-08-14
Method and system for selectively masking test responses Grant 7,376,873 - Vranken , et al. May 20, 2	2008-05-20
Method and system for selectively masking test responses App 20070067688 - Vranken; Hendrikus Petrus Elisabeth ; et al.	2007-03-22
Arrangement and method of testing an integrated circuit Grant 7,143,322 - Hapke November 28, 2	2006-11-28
Integrated circuit with test circuit Grant 7,139,953 - Hapke November 21, 2	2006-11-21
Integrated circuit with self-testing circuit Grant 7,039,844 - Hapke May 2, 2	2006-05-02
Integrated circuit with test circuit App 20050160338 - Hapke, Friedrich	2005-07-21
Integrated circuit with self-testing circuit App 20050050420 - Hapke, Friedrich	2005-03-03
Arrangement and method of testing an integrated circuit Grant 6,789,219 - Hapke , et al. September 7, 2	2004-09-07
Integrated circuit with self-test circuit Grant 6,789,221 - Hapke September 7, 2	2004-09-07
Arrangement and method having a data word generator for testing integrated circuits Grant 6,768,292 - Hapke July 27, 2	2004-07-27
Arrangement and method for testing integrated circuits App 20020144202 - Hapke, Friedrich	2002-10-03
Integrated circuit with self-test circuit App 20020069387 - Hapke, Friedrich	2002-06-06
Arrangement and method of testing an integrated circuit App 20020069027 - Hapke, Friedrich	2002-06-06
Arrangement and method of testing an integrated circuit App 20020069385 - Hapke, Friedrich ; et al.	2002-06-06
Test circuit for MOS devices Grant 4,398,146 - Draheim , et al. August 9, 1	1983-08-09
MOS Integrated test circuit using field effect transistors Grant 4,339,710 - Hapke July 13, 1	1982-07-13
Integrated circuit arrangement in MOS-technology with field-effect transistors Grant 4,336,495 - Hapke June 22, 1	1982-06-22

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.