Haond; Michel

Patent Applications and Registrations

Patent applications and USPTO patent grants for Haond; Michel.The latest application filed is for "phase change memory".

Company Profile

3.13.6

Haond; Michel - Crolles FR
Haond; Michel - Meylan FR
Haond, Michel - Gresivaudan FR
Haond; Michel - 38240 Meylan FR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Phase change memory Grant 10,903,423 - Morin , et al. January 26, 2	2021-01-26
Phase Change Memory App 20200119269 - MORIN; Pierre ; et al.	2020-04-16
Phase change memory Grant 10,510,955 - Morin , et al. Dec	2019-12-17
Phase Change Memory App 20180301625 - MORIN; Pierre ; et al.	2018-10-18
Process for achieving intermetallic and/or intrametallic air isolation in an integrated circuit, and integrated circuit obtained Grant 6,812,113 - Alieu , et al. November 2, 2	2004-11-02
Integrated semiconductor memory device having quantum well buried in a substrate Grant 6,724,660 - Skotnicki , et al. April 20, 2	2004-04-20
Process for fabricating a MOS transistor having two gates, one of which is buried and corresponding transistor Grant 6,555,482 - Skotnicki , et al. April 29, 2	2003-04-29
Method of forming insulated metal interconnections in integrated circuits Grant 6,451,669 - Torres , et al. September 17, 2	2002-09-17
Integrated semiconductor memory device App 20020097608 - Skotnicki, Thomas ; et al.	2002-07-25
Process for fabricating a substrate of the silicon-on-insulator or silicon-on-nothing type and resulting device App 20020076899 - Skotnicki, Thomas ; et al.	2002-06-20
Process for fabricating a MOS transistor having two gates, one of which is buried and corresponding transistor App 20010053569 - Skotnicki, Thomas ; et al.	2001-12-20
Method of forming insulated metal interconnections in integrated circuits App 20010036723 - Torres, Joaquim ; et al.	2001-11-01
Method of isolating active areas of a semiconductor substrate by shallow trenches and narrow trenches Grant 5,641,704 - Paoli , et al. June 24, 1	1997-06-24
Method for etching integrated-circuit layers to a fixed depth and corresponding integrated circuit Grant 5,330,617 - Haond July 19, 1	1994-07-19
SOI MOS transistor with a substrate-source connection Grant 5,089,870 - Haond February 18, 1	1992-02-18
Process for the production of an oriented monocrystalline silicon film with localized defects on an insulating support Grant 4,773,964 - Haond * September 27, 1	1988-09-27
Process for the production of mutually electrically insulated monocrystalline silicon islands using laser recrystallization Grant 4,725,561 - Haond , et al. February 16, 1	1988-02-16
Process for the production of an insulating support on an oriented monocrystalline silicon film with localized defects Grant 4,678,538 - Haond , et al. July 7, 1	1987-07-07
Heat treatment machine for semiconductors Grant 4,581,520 - Vu , et al. April 8, 1	1986-04-08

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