loadpatents
name:-0.00041913986206055
name:-0.021716117858887
name:-0.00044488906860352
Hameenanttila; Tom Patent Filings

Hameenanttila; Tom

Patent Applications and Registrations

Patent applications and USPTO patent grants for Hameenanttila; Tom.The latest application filed is for "method and apparatus for use of a preload instruction to improve efficiency of cache".

Company Profile
0.27.0
  • Hameenanttila; Tom - Phoenix AZ
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and apparatus for use of a preload instruction to improve efficiency of cache
Grant 9,892,051 - Jamil , et al. February 13, 2
2018-02-13
Method and apparatus for optimizing translation of a virtual memory address into a physical memory address in a processor having virtual memory
Grant 9,619,402 - Zhang , et al. April 11, 2
2017-04-11
Method and apparatus for sharing instruction scheduling resources among a plurality of execution threads in a multi-threaded processor architecture
Grant 9,606,800 - Hameenanttila , et al. March 28, 2
2017-03-28
Method and apparatus for processing speculative, out-of-order memory access instructions
Grant 9,442,735 - Jamil , et al. September 13, 2
2016-09-13
Thread-aware cache memory management
Grant 9,223,709 - O'Bleness , et al. December 29, 2
2015-12-29
Hardware support for performance analysis
Grant 9,195,524 - Wiesner , et al. November 24, 2
2015-11-24
Method and apparatus for associating requests and responses with identification information
Grant 9,086,976 - O'Bleness , et al. July 21, 2
2015-07-21
Method and apparatus having a snoop filter decoupled from an associated cache and a buffer for replacement line addresses
Grant 9,058,272 - O'Bleness , et al. June 16, 2
2015-06-16
Detecting and reissuing of loop instructions in reorder structure
Grant 9,026,769 - Jamil , et al. May 5, 2
2015-05-05
Cache memory bank selection
Grant 8,990,505 - Jamil , et al. March 24, 2
2015-03-24
Method and apparatus for improving cache efficiency
Grant 8,943,273 - Jamil , et al. January 27, 2
2015-01-27
Speculative scheduling of memory instructions in out-of-order processor based on addressing mode comparison
Grant 8,918,625 - O'Bleness , et al. December 23, 2
2014-12-23
Dynamic pipeline reconfiguration including changing a number of stages
Grant 8,806,181 - O'Bleness , et al. August 12, 2
2014-08-12
Programmable cache access protocol to optimize power consumption and performance
Grant 8,769,204 - Delgross , et al. July 1, 2
2014-07-01
Method and apparatus for associating requests and responses with identification information
Grant 8,688,919 - O'Bleness , et al. April 1, 2
2014-04-01
Way-selecting translation lookaside buffer
Grant 8,631,206 - O'Bleness , et al. January 14, 2
2014-01-14
Programmable cache access protocol to optimize power consumption and performance
Grant 8,458,404 - Delgross , et al. June 4, 2
2013-06-04
Method and apparatus for data-less bus query
Grant 8,296,525 - O'Bleness , et al. October 23, 2
2012-10-23
Method and apparatus for hardware-configurable multi-policy coherence protocol
Grant 8,135,916 - O'Bleness , et al. March 13, 2
2012-03-13

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