Hamamoto; Masato
Patent Applications and Registrations
Patent applications and USPTO patent grants for Hamamoto; Masato.The latest application filed is for "semiconductor device".
- Hamamoto; Masato - Iruma JP
- Hamamoto, Masato - Iruma-shi JP
- Hamamoto; Masato - Ohme JP
- Hamamoto; Masato - Tokyo JP
- Hamamoto; Masato - Ome JP
| Patent | Date |
|---|---|
| Semiconductor device Grant 7,576,406 - Tamaki , et al. August 18, 2 | 2009-08-18 |
| Semiconductor integrated circuit Grant 6,937,068 - Nakayama , et al. August 30, 2 | 2005-08-30 |
| Test method of semiconductor intergrated circuit and test pattern generator Grant 6,922,803 - Nakao , et al. July 26, 2 | 2005-07-26 |
| Semiconductor device App 20040183159 - Tamaki, Yoichi ; et al. | 2004-09-23 |
| Semiconductor integrated circuit and its fabrication method App 20040036497 - Nakayama, Michiaki ; et al. | 2004-02-26 |
| Manufacturing method of semiconductor device Grant 6,670,201 - Kouno , et al. December 30, 2 | 2003-12-30 |
| Semiconductor integrated circuit and its fabrication method Grant 6,636,075 - Nakayama , et al. October 21, 2 | 2003-10-21 |
| Semiconductor integrated circuit and its fabrication method App 20020070760 - Nakayama, Michiaki ; et al. | 2002-06-13 |
| Test method of semiconductor intergrated circuit and test pattern generator App 20020073373 - Nakao, Michinobu ; et al. | 2002-06-13 |
| Manufacturing method of semiconductor device App 20020036534 - Kouno, Masaki ; et al. | 2002-03-28 |
| Semiconductor integrated circuit and its fabrication method App 20010009383 - Nakayama, Michiaki ; et al. | 2001-07-26 |
| Clock feeding circuit and clock wiring system Grant 5,140,184 - Hamamoto , et al. August 18, 1 | 1992-08-18 |
| Integrated logic circuit having plural input cells and flip-flop and output cells arranged in a cell block Grant 5,055,710 - Tanaka , et al. October 8, 1 | 1991-10-08 |
| Wiring method of on-chip modification for an LSI Grant 5,043,297 - Suzuki , et al. August 27, 1 | 1991-08-27 |
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