loadpatents
name:-0.0067698955535889
name:-0.0069239139556885
name:-0.0035641193389893
Halvorson; Brian Patent Filings

Halvorson; Brian

Patent Applications and Registrations

Patent applications and USPTO patent grants for Halvorson; Brian.The latest application filed is for "wafer level integrated circuit probe array and method of construction".

Company Profile
3.7.7
  • Halvorson; Brian - St. Paul MN
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Testing apparatus and method for microcircuit testing with conical bias pad and conductive test pin rings
Grant 10,928,423 - DeBauche , et al. February 23, 2
2021-02-23
Wafer level integrated circuit probe array and method of construction
Grant 10,330,702 - Edwards , et al.
2019-06-25
Wafer Level Integrated Circuit Probe Array and Method of Construction
App 20190041429 - Edwards; Jathan ;   et al.
2019-02-07
Testing Apparatus And Method For Microcircuit Testing With Conical Bias Pad And Conductive Test Pin Rings
App 20190004093 - DeBauche; John ;   et al.
2019-01-03
Wafer level integrated circuit probe array and method of construction
Grant 10,078,101 - Edwards , et al. September 18, 2
2018-09-18
Testing apparatus and method for microcircuit testing with conical bias pad and conductive test pin rings
Grant 10,067,164 - DeBauche , et al. September 4, 2
2018-09-04
Wafer level integrated circuit contactor and method of construction
Grant 9,817,026 - Edwards , et al. November 14, 2
2017-11-14
Testing apparatus and method for microcircuit and wafer level IC testing
Grant 9,696,347 - DeBauche , et al. July 4, 2
2017-07-04
Wafer Level Integrated Circuit Probe Array and Method of Construction
App 20170074926 - Edwards; Jathan ;   et al.
2017-03-16
Testing Apparatus And Method For Microcircuit Testing With Conical Bias Pad And Conductive Test Pin Rings
App 20170059616 - DeBauche; John ;   et al.
2017-03-02
Wafer Level Integrated Circuit Contactor and Method of Construction
App 20160161528 - Edwards; Jathan ;   et al.
2016-06-09
Wafer level integrated circuit contactor and method of construction
Grant 9,261,537 - Edwards , et al. February 16, 2
2016-02-16
Testing Apparatus And Method For Microcircuit And Wafer Level Ic Testing
App 20150015287 - DeBauche; John ;   et al.
2015-01-15
Wafer Level Integrated Circuit Contactor and Method of Construction
App 20130342233 - Edwards; Jathan ;   et al.
2013-12-26

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed