loadpatents
Patent applications and USPTO patent grants for Halleck; William R..The latest application filed is for "multiple dies hardware processors and methods".
Patent | Date |
---|---|
Bimodal PHY for low latency in high speed interconnects Grant 11,354,264 - Iyer , et al. June 7, 2 | 2022-06-07 |
Multiple dies hardware processors and methods Grant 11,294,852 - Nassif , et al. April 5, 2 | 2022-04-05 |
Multiple Dies Hardware Processors And Methods App 20220050805 - NASSIF; NEVINE ;   et al. | 2022-02-17 |
Bimodal Phy For Low Latency In High Speed Interconnects App 20210182231 - Iyer; Venkatraman ;   et al. | 2021-06-17 |
Bimodal PHY for low latency in high speed interconnects Grant 10,963,415 - Iyer , et al. March 30, 2 | 2021-03-30 |
High speed interconnect with channel extension Grant 10,931,329 - Shah , et al. February 23, 2 | 2021-02-23 |
Multiple Dies Hardware Processors And Methods App 20200334196 - NASSIF; NEVINE ;   et al. | 2020-10-22 |
Multiple dies hardware processors and methods Grant 10,795,853 - Nassif , et al. October 6, 2 | 2020-10-06 |
Bimodal Phy For Low Latency In High Speed Interconnects App 20200293480 - Iyer; Venkatraman ;   et al. | 2020-09-17 |
Bimodal phy for low latency in high speed interconnects Grant 10,599,602 - Iyer , et al. | 2020-03-24 |
Bimodal Phy For Low Latency In High Speed Interconnects App 20190310959 - Iyer; Venkatraman ;   et al. | 2019-10-10 |
Bimodal PHY for low latency in high speed interconnects Grant 10,372,657 - Iyer , et al. | 2019-08-06 |
High performance interconnect link state transitions Grant 10,324,882 - Halleck , et al. | 2019-06-18 |
Link-physical layer interface adapter Grant 10,152,446 - Iyer , et al. Dec | 2018-12-11 |
High performance interconnect Grant 10,025,746 - Halleck , et al. July 17, 2 | 2018-07-17 |
High Speed Interconnect With Channel Extension App 20180191523 - Shah; Rahul R. ;   et al. | 2018-07-05 |
Bimodal Phy For Low Latency In High Speed Interconnects App 20180181525 - Iyer; Venkatraman ;   et al. | 2018-06-28 |
Multiple Dies Hardware Processors And Methods App 20180101502 - NASSIF; NEVINE ;   et al. | 2018-04-12 |
Link-physical Layer Interface Adapter App 20180095923 - Iyer; Venkatraman ;   et al. | 2018-04-05 |
High performance interconnect link state transitions Grant 9,910,809 - Halleck , et al. March 6, 2 | 2018-03-06 |
High Performance Interconnect Link State Transitions App 20170109300 - Halleck; William R. ;   et al. | 2017-04-20 |
High Performance Interconnect Link State Transitions App 20160179730 - Halleck; William R. ;   et al. | 2016-06-23 |
High Performance Interconnect App 20160179740 - Halleck; William R. ;   et al. | 2016-06-23 |
uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.
While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.
All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.