loadpatents
name:-0.0310959815979
name:-0.034198999404907
name:-0.0046141147613525
Halle; Scott D. Patent Filings

Halle; Scott D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Halle; Scott D..The latest application filed is for "baseline overlay control with residual noise reduction".

Company Profile
3.29.25
  • Halle; Scott D. - Slingerlands NY
  • Halle; Scott D. - Hopewell Junction NY US
  • Halle; Scott D. - Hopewell Juction NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Baseline overlay control with residual noise reduction
Grant 10,642,161 - Corliss , et al.
2020-05-05
Baseline Overlay Control With Residual Noise Reduction
App 20200117100 - Corliss; Daniel A. ;   et al.
2020-04-16
Process-metrology reproducibility bands for lithographic photomasks
Grant 10,210,292 - Bailey , et al. Feb
2019-02-19
Process-metrology Reproducibility Bands For Lithographic Photomasks
App 20180101630 - Bailey; Todd C. ;   et al.
2018-04-12
Process-metrology reproducibility bands for lithographic photomasks
Grant 9,928,316 - Bailey , et al. March 27, 2
2018-03-27
Process-metrology Reproducibility Bands For Lithographic Photomasks
App 20160283617 - Bailey; Todd C. ;   et al.
2016-09-29
Metrology marks for unidirectional grating superposition patterning processes
Grant 9,059,102 - Ausschnitt , et al. June 16, 2
2015-06-16
Metrology Marks For Unidirectional Grating Superposition Patterning Processes
App 20150048525 - Ausschnitt; Christopher P. ;   et al.
2015-02-19
Metrology Marks For Bidirectional Grating Superposition Patterning Processes
App 20150050755 - Ausschnitt; Christopher P. ;   et al.
2015-02-19
Mask layout formation
Grant 8,875,063 - Baum , et al. October 28, 2
2014-10-28
Process of making a lithographic structure using antireflective materials
Grant 8,609,322 - Angelopoulos , et al. December 17, 2
2013-12-17
Method of forming a semiconductor device having a cut-way hole to expose a portion of a hardmask layer
Grant 8,507,346 - Burkhardt , et al. August 13, 2
2013-08-13
Wafer Fill Patterns And Uses
App 20130181267 - Burkhardt; Martin ;   et al.
2013-07-18
Process Of Making A Lithographic Structure Using Antireflective Materials
App 20130017486 - Angelopoulos; Marie ;   et al.
2013-01-17
Process of making a lithographic structure using antireflective materials
Grant 8,293,454 - Angelopoulos , et al. October 23, 2
2012-10-23
Wafer Fill Patterns And Uses
App 20120126294 - Burkhardt; Martin ;   et al.
2012-05-24
Methods for forming a composite pattern including printed resolution assist features
Grant 8,158,334 - Gabor , et al. April 17, 2
2012-04-17
Mask Layout Formation
App 20120089953 - Baum; Zachary ;   et al.
2012-04-12
Integrated circuits and methods of design and manufacture thereof
Grant 8,039,203 - Wang , et al. October 18, 2
2011-10-18
Line ends forming
Grant 7,993,815 - Colburn , et al. August 9, 2
2011-08-09
Process of making a semiconductor device using multiple antireflective materials
Grant 7,968,270 - Angelopoulos , et al. June 28, 2
2011-06-28
Multiple exposure lithography method incorporating intermediate layer patterning
Grant 7,914,975 - Burns , et al. March 29, 2
2011-03-29
Semiconductor device manufacturing methods
Grant 7,759,235 - Zhuang , et al. July 20, 2
2010-07-20
Gate patterning scheme with self aligned independent gate etch
Grant 7,749,903 - Halle , et al. July 6, 2
2010-07-06
Gate Patterning Scheme With Self Aligned Independent Gate Etch
App 20090203200 - Halle; Scott D. ;   et al.
2009-08-13
Methods For Forming A Composite Pattern Including Printed Resolution Assist Features
App 20090181330 - Gabor; Allen H. ;   et al.
2009-07-16
Integrated Circuits and Methods of Design and Manufacture Thereof
App 20090081563 - Wang; Helen ;   et al.
2009-03-26
Memory Cell
App 20090065956 - Colburn; Matthew E. ;   et al.
2009-03-12
Line Ends Forming
App 20090068837 - Colburn; Matthew E. ;   et al.
2009-03-12
Process Of Making A Lithographic Structure Using Antireflective Materials
App 20090061355 - Angelopoulos; Marie ;   et al.
2009-03-05
Process of making a semiconductor device using multiple antireflective materials
Grant 7,485,573 - Angelopoulos , et al. February 3, 2
2009-02-03
Process Of Making A Semiconductor Device Using Multiple Antireflective Materials
App 20080311508 - Angelopoulos; Marie ;   et al.
2008-12-18
Semiconductor device manufacturing methods
App 20080305623 - Zhuang; Haoren ;   et al.
2008-12-11
Multiple Exposure Lithography Method Incorporating Intermediate Layer Patterning
App 20080254633 - Burns; Sean D. ;   et al.
2008-10-16
Highly selective nitride etching employing surface mediated uniform reactive layer films
Grant 7,268,082 - Halle September 11, 2
2007-09-11
Process of making a semiconductor device using multiple antireflective materials
App 20070196748 - Angelopoulos; Marie ;   et al.
2007-08-23
Method to reduce photoresist pattern collapse by controlled surface microroughening
Grant 7,229,936 - Brodsky , et al. June 12, 2
2007-06-12
Process of making a lithographic structure using antireflective materials
App 20070015082 - Angelopoulos; Marie ;   et al.
2007-01-18
Etch selectivity enhancement for tunable etch resistant anti-reflective layer
Grant 7,077,903 - Babich , et al. July 18, 2
2006-07-18
Highly selective nitride etching employing surface mediated uniform reactive layer films
App 20050245155 - Halle, Scott D.
2005-11-03
Method To Reduce Photoresist Pattern Collapse By Controlled Surface Microroughening
App 20050245094 - Brodsky, Colin J. ;   et al.
2005-11-03
Etch selectivity enhancement for tunable etch resistant anti-reflective layer
App 20050098091 - Babich, Katherina E. ;   et al.
2005-05-12
Process for forming a damascene structure
Grant 6,649,531 - Cote , et al. November 18, 2
2003-11-18
Removable inorganic anti-reflection coating process
Grant 6,607,984 - Lee , et al. August 19, 2
2003-08-19
Process for forming a damascene structure
App 20030100190 - Cote, William J. ;   et al.
2003-05-29
Retrograde openings in thin films
Grant 6,355,567 - Halle , et al. March 12, 2
2002-03-12
Method of controllably forming a LOCOS oxide layer over a portion of a vertically extending sidewall of a trench extending into a semiconductor substrate
Grant 6,153,474 - Ho , et al. November 28, 2
2000-11-28
Methods for roughening and volume expansion of trench sidewalls to form high capacitance trench cell for high density dram applications
Grant 5,877,061 - Halle , et al. March 2, 1
1999-03-02
Assembly for measuring a trench depth parameter of a workpiece
Grant 5,691,540 - Halle , et al. November 25, 1
1997-11-25
Storage node process for deep trench-based DRAM
Grant 5,656,535 - Ho , et al. August 12, 1
1997-08-12

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